- Feb 03, 2025
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Dietmar Muscholik authored
- correct include guard - unify regulator configuration a little more - remove unused stuff - fix typos in comments
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- Jan 31, 2025
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Tobias Kahlki authored
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In the DP-driver there is "qcom,edp-vcc-en-gpio" that a gpio can be assigned to in the DT and that powers on the display. But this gpio is switched AFTER the display has been powered on. Thus there is no other way to turn on a display but using a hog-gpio. There is no way to assign a backlight-device to (e)DP, not even a PWM, only a bunch of gpios. So the pwm is configured as gpio, meaning there is no way to adjust the backlight-brightness but 2 ways to switch the backlight off, because both gpios must be high.
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This is used to enable an eDP with a hog-gpio
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This also introduces a more logical naming convention: seco-<soc>-<som>-<baseboard>-<display>.dts dtsi-files for baseboards are prefixed with "baseboard-" and those for displays with "display-".
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Tobias Kahlki authored
The QCS5430 is a QCS6490 that is lacking some features, so we use the QCS6490 dtsi-file for both and disable the non-existing features for QCS5430. The opposite way would be less ugly but would require modification of the Qualcomm-provided dtsi-files.
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Qualcomm uses off-tree device-tree-overlays for displays. These overlays are applied to the base device-tree at build time to generate a combined device- tree. Because they are maintained in separate repositories they do not necessarily match the kernel. If so, for the dtc everything seems to be right, because it has no knowledge about the base device-tree. The errors, like the most common "unknown label" because of a simple typo, occure later when the overlays are applied. While the dtc says: this file, this line, this error, the tool that applies the overlays only says "FDT_ERR_NOTFOUND", hidden somewhere in the bitbake-logs, and it takes hours and hours of trial-and-error to figure out what went wrong. Furthermore, because the overlays are not applied dynamically at runtime but at build-time, it does not make any sense to use overlays. They cause nothing but trouble. For this reasons th overlays have been turned to dtsi-files.
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Even without development is unconvenient enough
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- Jan 30, 2025
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Tobias Kahlki authored
- Fix the main comments to reflect the devicetree files correctly - Update the copyright
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Tobias Kahlki authored
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Tobias Kahlki authored
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Tobias Kahlki authored
Rename the B79 include file and also add the file -b79 file extension to the base devicetrees.
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Oleksii Kutuzov authored
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- Jan 27, 2025
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Tobias Kahlki authored
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Oleksii Kutuzov authored
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Oleksii Kutuzov authored
Remove reference to qcs6490 as E81 has both qcs6490 and qcs5430
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Oleksii Kutuzov authored
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Oleksii Kutuzov authored
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Oleksii Kutuzov authored
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- Jan 17, 2025
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usb_1 is a little bit weird, copied from qcom-device-trees
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- Jan 16, 2025
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Oleksii Kutuzov authored
We have 5 UARTs in E81 design, accordingly increasing the number of possible uarts.
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Oleksii Kutuzov authored
For three options: - QCS6490 - QCS5430 FP1 - QCS5430 FP2
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The driver has been imported from branch seco_lf-6.6.23-2.0.0_e39-dev
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Oleksii Kutuzov authored
An exact copy of the qcom_defconfig
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- Dec 14, 2024
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Linux Build Service Account authored
Merge "QCLINUX: arm64: defconfig: Enable GPUCC SA8775P driver as static module" into kernel.qclinux.1.0.r1-rel
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Linux Build Service Account authored
* changes: BACKPORT: can: mcp251xfd: mcp251xfd_ring_init(): check TX-coalescing configuration BACKPORT: can: mcp251xfd: properly indent labels
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Linux Build Service Account authored
Merge "BACKPORT: can: mcp251xfd: move mcp251xfd_timestamp_start()/stop() into mcp251xfd_chip_start/stop()" into kernel.qclinux.1.0.r1-rel
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Imran Shaik authored
Add support to enable the GPUCC SA8775P driver as static module. Change-Id: Id7237a7f1f6769db821ddb59f08d96fad754d579 Signed-off-by:
Imran Shaik <quic_imrashai@quicinc.com>
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Anup authored
TX-coalescing configuration When changing the interface from CAN-CC to CAN-FD mode the old coalescing parameters are re-used. This might cause problem, as the configured parameters are too big for CAN-FD mode. During testing an invalid TX coalescing configuration has been seen. The problem should be been fixed in the previous patch, but add a safeguard here to ensure that the number of TEF coalescing buffers (if configured) is exactly the half of all TEF buffers. Link: https://lore.kernel.org/all/20240805-mcp251xfd-fix-ringconfig-v1-2-72086f0ca5ee@pengutronix.de Signed-off-by:
Marc Kleine-Budde <mkl@pengutronix.de> (cherry picked from commit ac2b81eb8b2d104033560daea886ee84531e3d0a) Signed-off-by:
Anup <quic_anupkulk@quicinc.com>
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Anup authored
To fix the coding style, remove the whitespace in front of labels. Signed-off-by:
Marc Kleine-Budde <mkl@pengutronix.de> (cherry picked from commit 51b2a721612236335ddec4f3fb5f59e72a204f3a) Signed-off-by:
Anup <quic_anupkulk@quicinc.com>
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Anup authored
into mcp251xfd_chip_start/stop() The mcp251xfd wakes up from Low Power or Sleep Mode when SPI activity is detected. To avoid this, make sure that the timestamp worker is stopped before shutting down the chip. Split the starting of the timestamp worker out of mcp251xfd_timestamp_init() into the separate function mcp251xfd_timestamp_start(). Call mcp251xfd_timestamp_init() before mcp251xfd_chip_start(), move mcp251xfd_timestamp_start() to mcp251xfd_chip_start(). In this way, mcp251xfd_timestamp_stop() can be called unconditionally by mcp251xfd_chip_stop(). Signed-off-by:
Marc Kleine-Budde <mkl@pengutronix.de> (cherry picked from commit a7801540f325d104de5065850a003f1d9bdc6ad3) Signed-off-by:
Anup <quic_anupkulk@quicinc.com>
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Yuvaraj Ranganathan authored
This reverts commit 8eb2a6b0. This reverts commit 665c84d5f7738cf0f700e8447153942dfcae644a. This reverts commit 6a73cc68. Change-Id: Iab6f2de32ac227aae6bbc93ac71affce01782f79 Signed-off-by:
Yuvaraj Ranganathan <quic_yrangana@quicinc.com>
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Jingyi Wang authored
The "capacity-dmips-mhz" and "dynamic-power-coefficient" are used to build Energy Model which in turn is used by EAS to take placement decisions. Change-Id: Ic95b0766b1e14485de09dc6362de24ed4072de30 Signed-off-by:
Jingyi Wang <quic_jingyw@quicinc.com>
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