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Commit c659e265 authored by Tobias Kahlki's avatar Tobias Kahlki
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[E81] Add dtsi-files for QCS5430-FP1 and QCS6490 

The QCS5430 is a QCS6490 that is lacking some features, so we use the
QCS6490 dtsi-file for both and disable the non-existing features for
QCS5430. The opposite way would be less ugly but would require modification
of the Qualcomm-provided dtsi-files.
parent 12d64ce9
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2 merge requests!13Merge E81 development branch into trunk,!6Add eDP support for E81
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arch/arm64/boot/dts/seco/include/e81-common.dtsi
+ 232
− 8
View file @ c659e265
......@@ -44,7 +44,31 @@ aliases {
chosen {
stdout-path = "serial0:115200n8";
};
backlight0: backlight0 {
compatible = "pwm-backlight";
pinctrl-names = "default";
pinctrl-0 = <&lcd0_bklt_en>;
//pwms = <LCD0_BKLT_PWM 4000000 0>;
pwms = <LCD0_BKLT_PWM 65535>;
brightness-levels = <
0 1 2 3 4 5 6 7 8 9
10 11 12 13 14 15 16 17 18 19
20 21 22 23 24 25 26 27 28 29
30 31 32 33 34 35 36 37 38 39
40 41 42 43 44 45 46 47 48 49
50 51 52 53 54 55 56 57 58 59
60 61 62 63 64 65 66 67 68 69
70 71 72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87 88 89
90 91 92 93 94 95 96 97 98 99
100>;
default-brightness-level = <50>;
enable-gpio = <LCD0_BKLT_EN GPIO_ACTIVE_HIGH>;
//enable-gpios = <&pm8350c_gpios 7 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
reg_5v_sleep: 5v_sleep {
compatible = "regulator-fixed";
regulator-name = "5V_SLEEP";
......@@ -89,7 +113,7 @@ reg_2v5_run: 2v5_run {
//vin-supply = <&vreg_l11c_3p3>;
vin-supply = <&reg_5v_run>;
};
/*
reg_0v9_qps: 0v9_qps {
compatible = "regulator-fixed";
regulator-name = "0V9_QPS";
......@@ -98,6 +122,7 @@ reg_0v9_qps: 0v9_qps {
gpio = <&pm8350c_gpios 2 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-enable-ramp-delay = <4300>;
vin-supply = <&reg_5v_run>;
};
reg_1v8_qps: 1v8_qps {
......@@ -109,8 +134,24 @@ reg_1v8_qps: 1v8_qps {
gpio = <&pm8350c_gpios 3 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-enable-ramp-delay = <10000>;
//vin-supply = <&reg_5v_run>;
vin-supply = <&reg_0v9_qps>; // lie
};
*/
/*
// regulator for reset???
// copied from qcom/qcs6490-addons-rb3gen2.dtsi
usbhub_rest_vreg: usbhub_rest_vreg {
compatible = "regulator-fixed";
regulator-name = "usbhub_rest_vreg";
pinctrl-names = "default";
//pinctrl-0 = <&pcie1_usb_hub_reset_default>;
pinctrl-0 = <&qps_rst_n>;
//gpio = <&tlmm 162 GPIO_ACTIVE_LOW>;
gpio = <&pm8350c_gpios 1 GPIO_ACTIVE_LOW>;
enable-active-high;
};
*/
reg_3v3_wifi: 3v3_wifi {
compatible = "regulator-fixed";
regulator-name = "3V3_WIFI";
......@@ -133,6 +174,77 @@ vreg_qps615_rsex: rsex_qps {
};
};
#if 0
// qps615-stuff, copied from qcom/qcs6490-addons-rb3gen2.dtsi
/ {
qps615_0p9_vreg: qps615-0p9-vreg {
compatible = "regulator-fixed";
regulator-name = "qps615_0p9_vreg";
gpio = <&pm8350c_gpios 2 0>;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
enable-active-high;
regulator-enable-ramp-delay = <4300>;
};
qps615_1p8_vreg: qps615-1p8-vreg {
compatible = "regulator-fixed";
regulator-name = "qps615_1p8_vreg";
gpio = <&pm8350c_gpios 3 0>;
vin-supply = <&qps615_0p9_vreg>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
enable-active-high;
regulator-enable-ramp-delay = <10000>;
};
qps615_rsex_vreg: qps615-rsex-vreg {
compatible = "regulator-fixed";
regulator-name = "qps615_rsex_vreg";
gpio = <&pm8350c_gpios 1 0>;
vin-supply = <&qps615_1p8_vreg>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
enable-active-high;
regulator-enable-ramp-delay = <10000>;
};
upd_3p3_vreg: upd_3p3_vreg {
compatible = "regulator-fixed";
regulator-name = "upd_3p3_vreg";
//gpio = <&pm7250b_gpios 1 0>;
vin-supply = <&qps615_rsex_vreg>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
//enable-active-high;
regulator-enable-ramp-delay = <10000>;
regulator-always-on;
};
upd_rest_vreg: upd_rest_vreg {
compatible = "regulator-fixed";
regulator-name = "upd_rest_vreg";
//gpio = <&pm8350c_gpios 4 0>;
vin-supply = <&upd_3p3_vreg>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
//enable-active-high;
regulator-always-on;
};
/*
usbhub_rest_vreg: usbhub_rest_vreg {
compatible = "regulator-fixed";
regulator-name = "usbhub_rest_vreg";
pinctrl-names = "default";
pinctrl-0 = <&pcie1_usb_hub_reset_default>;
gpio = <&tlmm 162 GPIO_ACTIVE_LOW>;
enable-active-high;
};
*/
};
// ... but did not help, even breaks everything
#endif
&apps_rsc {
// PM7325, U1900
regulators-0 {
......@@ -172,6 +284,8 @@ vreg_s6b_0v752: smps6 {
*/
vreg_s7b_0p972: smps7 {
regulator-name = "VDD_SYS_0V952";
//regulator-min-microvolt = <535000>;
//regulator-max-microvolt = <1120000>;
regulator-min-microvolt = <904000>;
regulator-max-microvolt = <1120000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
......@@ -214,6 +328,8 @@ vreg_l4b_0p752: ldo4 {
vreg_l5b_0p752: ldo5 {
regulator-name = "VDD_LPI_CX";
//regulator-min-microvolt = <552000>;
//regulator-max-microvolt = <832000>;
regulator-min-microvolt = <752000>;
regulator-max-microvolt = <820000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
......@@ -495,6 +611,24 @@ &i2c13 { // TS_I2C
status = "okay";
};
// the lpass_* stuff has something to do with audio
// we disable them for now to suppress error messages
&lpass_rx_macro {
status = "disabled";
};
&lpass_tx_macro {
status = "disabled";
};
&lpass_wsa_macro {
status = "disabled";
};
&lpass_va_macro {
status = "disabled";
};
// PCIe
// PCIe 0 is external on carrier board
&pcie0 {
......@@ -549,6 +683,14 @@ &pcie1_phy {
status = "okay";
};
// took from qcom/sc7280-qcard.dtsi, hoping they know what they do
&pm8350c_pwm {
pinctrl-names = "default";
pinctrl-0 = <&lcd0_bklt_pwm>;
};
// GENI Serial Engine QUP Wrapper Controller
// (parent of all serial interfaces)
&qupv3_id_0 {
......@@ -598,6 +740,17 @@ &sdhc_1 {
status = "okay";
};
// disable soundwire devices
&swr0 {
status = "disabled";
};
&swr1 {
status = "disabled";
};
&swr2 {
status = "disabled";
};
// uarts
&uart6 { // SER0
status = "okay";
......@@ -615,7 +768,6 @@ &uart9 { // SER3
compatible = "qcom,geni-uart";
pinctrl-names = "default";
pinctrl-0 = <&qup_uart9_tx>, <&qup_uart9_rx>;
status = "okay";
};
......@@ -641,6 +793,7 @@ &ufs_mem_phy {
// USB0
// from qcom/qcs6490-rb3gen2.dts
// why is this completely different from usb_2 ??????
/delete-node/ &usb_1_dwc3;
&usb_1 {
......@@ -659,9 +812,10 @@ &usb_1 {
iommus = <&apps_smmu 0xe0 0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy", "usb3-phy";
maximum-speed = "super-speed";
phys = <&usb_1_hsphy>/*, <&usb_1_ssphy>*/;
phy-names = "usb2-phy"/*, "usb3-phy"*/;
//maximum-speed = "super-speed";
maximum-speed = "high-speed";
snps,dis-u2-entry-quirk;
snps,dis-u1-entry-quirk;
dr_mode = "otg";
......@@ -680,6 +834,8 @@ &usb_1_hsphy {
status = "okay";
};
// no idea what this is good for but without there will be a kernel panic
// because of a NULL-pointer
&usb_1_qmpphy {
vdda-phy-supply = <&vreg_l6b_1p2>;
vdda-pll-supply = <&vreg_l1b_0p912>;
......@@ -716,8 +872,25 @@ pcie_switch: qps615@77 {
};
};
/*
&vreg_l7b_2p952 {
/delete-property/regulator-min-microvolt;
/delete-property/regulator-max-microvolt;
regulator-allow-set-load;
regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM RPMH_REGULATOR_MODE_HPM>;
};
&vreg_l9b_1p2 {
/delete-property/regulator-min-microvolt;
/delete-property/regulator-max-microvolt;
regulator-allow-set-load;
regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM RPMH_REGULATOR_MODE_HPM>;
};
*/
// children of i2c2 (I2C_PM)
&i2c2 {
// will be gpiochip3
stm32: stm32@40 {
reg = <0x40>;
compatible = "seco,stm32";
......@@ -826,7 +999,58 @@ eth1_pci_iommu_group: eth1_pci_iommu_group {
};
};
// pin control
// pinctrl
&pm8350c_gpios {
// gpiochip1
/*
qps_rst_n: qps_rst_n {
pins = "gpio1";
function = "normal";
line-name = "QPS_RST#";
bias-disable;
qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;
output-low;
};
qps_0v9_en: 0v9_qps_en {
pins = "gpio2";
function = "normal";
line-name = "0V9_QPS_EN";
bias-disable;
qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;
output-low;
};
qps_1v8_en: 1v8_qps_en {
pins = "gpio3";
function = "normal";
line-name = "1V8_QPS_EN";
bias-disable;
qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;
output-low;
};
*/
lcd0_bklt_en: lcd0_bklt_en {
pins = "gpio7";
function = "normal";
bias-disable;
line-name = "LCD0_BKLT_EN";
qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;
/* Force backlight to be disabled to match state at boot. */
output-high;
};
lcd0_bklt_pwm: lcd0_bklt_pwm {
pins = "gpio8";
function = "func1";
bias-disable;
qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;
output-low;
power-source = <0>;
};
};
&tlmm {
pcie1_reset_n: pcie1-reset-n-state {
pins = "gpio2";
......
arch/arm64/boot/dts/seco/include/qcs5430-fp1-e81.dtsi
+ 2
− 1
View file @ c659e265
......@@ -28,6 +28,7 @@ / {
qcom,msm-id = <0x1023F 0x10000>;
qcom,board-id = <32 0x2>, <32 0x602>;
// remove non-existing CPUs
cpus {
cpu-map {
cluster0 {
......@@ -51,4 +52,4 @@ &pcie1 {
status = "ok";
};
#endif
\ No newline at end of file
#endif
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