The regulators related to `vcc_blk_sw` and `vcc_lcd_sw` have been
modified removing the `regulator-always-on` entry. This change requires
that:
- the backlight node has the `enable-gpio` and the `power-supply`
correctly set (now added);
- the panel node has the `backlight`, `power-supply` and `enable-gpio`
correctly set (now added).

The regulator enabling the backlight has been removed because it has the
same function of `enable-gpio` in the backlight node.

Additionally, all the display-related nodes have been refactored to
move all the related nodes into their overlays.

The watchdog feature is activated by default from the SCFW.

The watchdog node was already configured in the file `imx8qxp.dtsi`
that is included in C57's device tree.

This commit only copies the watchdog node to the linux device tree to
configure the timeout easier.

Tested the panel Innolux G156HCE-L01.

Tested with FN101PGRGUL034C 1280*800 with cable LVDS CV-1412/240.

The panel is AUO G101EAN02.

Tested with FN070PGRGUL037C 800x480 with cable LVDS CV-1408/750.

The panel is Innolux NE070NB-04F.

The I2C1 is connected to the I2C touch socket.

Test with panel BOE EV156FHM-N10 1920x1080.

Requires the firmware to be in the filesystem. For this, it requires
the machine configuration to include:
```
MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS:append = " \
   linux-firmware-sd8997 \
"
```

Add overlay to enable the LVDS panel 1024x600.

Add to the device tree the required nodes to load the file system
from USB 3.0 or eMMC.

Add the minimal device tree in order to correctly boot the board
loading the filesystem with NFS (USB and eMMC are not supported
yet).

--

Commit: https://git.seco.com/edgehog/infrastructure/gitlab-ci/-/commit/9a507bbe294beab4fd3122b5524e34ab474ef798

[BITBAKE] Handle custom Edgehog distros

In order to handle the scenarios where bitbake needs to compile an
image different from the standard ones we introduce the possibility to
have a custom DISTRO variable value. However, the variable shall follow
the following convention:

* The first part of the string shall indicate the standard Edgehog OS
  distro, i.e. 'things' or 'embedded' as of now
* The second part of the string shall be the custom Edgehog OS image
  distro with at maximum a '-' as a separator, e.g. 'custom-image'
* The two parts of the string shall be separated by a '-'

An example could be 'embedded-custom-image'.

--

Commit: https://git.seco.com/edgehog/infrastructure/gitlab-ci/-/commit/d769f60447120a2b55e08fb5581b91ebcb89cbac

[TEST] Allow Edgehog Things LAVA test on Intel

* The 'apollolake' machine is no longer used since a single Intel image
  is released

--

Commit: https://git.seco.com/edgehog/infrastructure/gitlab-ci/-/commit/2f3d9c1e247e57dfca29905b6471f7a88f2b8721

[RELEASE] Fix on the software artifact name

* This commit removee the read-only SAS token from the name of the artifact

--

Commit: https://git.seco.com/edgehog/infrastructure/gitlab-ci/-/commit/bd3d87e08fa8651a840c68c602cf2eecb7b464f3

[KERNEL][VERSION] Update preferrred version for C31

* Update preferred kernel version to 5.10 for C31
* Add comment to make the kernel version forcing reason for some of the
  boards more explanatory

--

Commit: https://git.seco.com/edgehog/infrastructure/gitlab-ci/-/commit/7c6986162840e8700ebb31e59599afa86004a597

[INTEGRATION] Fix on integration branch name

Since now, the integration branch name created by a MR on the BSP
into the layer was formed by the BB_RECIPE_NAME followed by the name
of merge request source branch. Changing the BB_RECIPE_NAME with the
CI_PROJECT_PATH variable to fix a bug in the build process when
integration is performed and the integration branch is not found and
also for consistency reasons.

--

Commit: https://git.seco.com/edgehog/infrastructure/gitlab-ci/-/commit/7e54754c566d4d1e7b4861bd19c94a8024c8605f

[SRCREV] Improve search for recipe names

Since now, when searching for a recipe name, if the line in the SRCREV.conf
file was matched, a break occurred, and all the lines with the same commit SHA
of that line were updated. This could be the case of the SRCREV.conf file
for meta-seco-rk layer where there need to be two recipes (one for u-boot
 and one for fw-sysdata) pointing to the same commit SHA.
In that case, if both recipes had the same commit SHA, the
script could handle it and update both lines. However, if a misalignment
occured by any chance, the script could not handle it. For this reason
we search for all occurrencies of the same recipe name in the
SRCREV.conf and update separately each occurrency.

--

Commit: https://git.seco.com/edgehog/infrastructure/gitlab-ci/-/commit/68ca4c9358b9ccae6abbd462a244cd058462cff1

[NOTIFY] Include SAS token in Teams notifications

* Since now the links available in the notification message displayed in
  Teams channel with the link, changelog and job results report were
broken for software artifacts in private container.
* Introducing the creation of read-only SAS token with 6-months
  expiration policy also for reports.
* Fix in deploy stage for software artifact URL generation in case of
  public containers.

--

Commit: https://git.seco.com/edgehog/infrastructure/gitlab-ci/-/commit/f9a26792ae6a7ab5a250583b301b600f387e8738

[ARTIFACTS][URL] Insert blob SAS token in URL

* For software artifacts that are saved within private Azure container
  it is necessary to add a blob SAS token in order for the URL to
correctly work. For such purpose we include the generation of a 6-months
duration read-only SAS token to be attached to the URL.
* Add AZURE_STORAGE_KEY among necessary CI/CD variables.

--

Commit: https://git.seco.com/edgehog/infrastructure/gitlab-ci/-/commit/9cfa350f7729972dd759803a46d91046795d06db

[CHANGELOG] Improve search for MRs to be collected

* Since now, for each project, the script was searching only for MRs
that were merged into branches having the same name of the manifest main
branch.
* In order to correct this approach, we define a function that searches
  for the INTEGRATION variable in each project and get the name of
the branch whose changes are integrated into the manifest main branch. If
more than one branch integrates into the manifest one, all of them are
considered in the search for MRs to be inserted in the changelog.
* Include BSP repositories and new meta-layers in CHANGELOG_PROJECTS
  variable

* fix possible uninitialized variables
* replace pointless do_div that on 32bit gives warning treated as error:
  do_div is used for u64 dividends, but the math is on u32 values.

* LED_0: Link Speed Indication LED for 100Mbps
* LED_1: Link Speed Indication LED for 1000Mbps
* LED_2: Driven low on Link (10, 100 or 1000 Mbps), Blinks on Activity
* LED POLARITY: active low

Avoid erroneous discard of valid set-up configurations.

In some situations, users might face EMI issues due to spikes around specific
frequencies: enabling Spread Spectrum Clocking is indicated to reduce the
electromagnetic peak around that specific frequency.

From the i.MX8MP SoC Reference Manual document, Section 5.1.8 "CCM Analog
Memory Map/Register Definition", the DRAM PLL, Audio PLL1, Audio PLL2 and
Video PLL1 have available the spread spectrum function.

The spread spectrum mode parameters of these PLLs can be calculated using
the formulas below:
* Modulation frequency: MF = Fin / p / mfr / (2^5) [Hz]
* Modulation rate: MR = mfr * mrr / m / (2^6) × 100 [%: percentage of the PLL output frequency]
* Where:
  * 0 <= mfr <= 255, 1 <= mrr <= 63, 0 <= mrr × mfr <= 512
  * Fin - PLL input clock frequency (typically, 24MHz = 24 * (10^6) Hz)
  * p = CCM_ANALOG_XXX_YYY_FDIV_CTL0[PLL_PRE_DIV] - reference frequency pre-divider value
  * m = CCM_ANALOG_XXX_YYY_FDIV_CTL0[PLL_MAIN_DIV] - PLL main divider value
  * mfr = CCM_ANALOG_XXX_YYY_SSCG_CTRL[PLL_MFREQ_CTL] - modulation frequency factor
  * mrr = CCM_ANALOG_XXX_YYY_SSCG_CTRL[PLL_MRAT_CTL] - modulation range factor

fsl,imx8mm-anatop optional properties:
 - anatop-<$1>,sscg-enable
   - type: boolean
   - <$1>: PLL clk name
   - description: enable SSCG
 - anatop-<$1>,mfr
   - type: u32
   - <$1>: PLL clk name
   - description: modulation frequency control value
 - anatop-<$1>,mrr
   - type: u32
   - <$1>: PLL clk name
   - description: modulation rate control value
 - anatop-<$1>,sel-pf
   - type: u32
   - <$1>: PLL clk name
   - description: modulation method control value

fsl,imx8mm-anatop dts example:
&anatop {
  anatop-video_pll1,sscg-enable;
  anatop-video_pll1,mfr = <12>;
  anatop-video_pll1,mrr = <14>;
  anatop-video_pll1,sel-pf = <2>;
};

Gianfranco Mariotti authored 10 months ago and Michele Cirinei committed 10 months ago

Correct the definitions of "Divide and Fraction Data Control" registers,
and use them in the appropriate code sections.

Gianfranco Mariotti authored 10 months ago and Michele Cirinei committed 10 months ago

On i.MX6 SoCs, raise lower limit for GPU scaling to avoid "IPU Warning"
framebuffer crash

Gianfranco Mariotti authored 10 months ago and Michele Cirinei committed 10 months ago

REFERENCE:
https://git2.toradex.com/cgit/linux-toradex.git/commit/drivers/mxc/gpu-viv?h=toradex_5.15-2.2.x-imx&id=5af7125b41d5c37a4fd97263ec1fb243320588ff
https://git2.toradex.com/cgit/linux-toradex.git/commit/drivers/mxc/gpu-viv?h=toradex_5.15-2.2.x-imx&id=4ff7ba8dd4042a6911c7c8657417818d82ec5174

Gianfranco Mariotti authored 10 months ago and Michele Cirinei committed 10 months ago

Disable SoC RTC, so module RTC PCF2123 can be assigned to system default rtc0.

Gianfranco Mariotti authored 10 months ago and Michele Cirinei committed 10 months ago

Disable SoC RTC, so board RTC PCF2123 can be assigned to system default rtc0.

Gianfranco Mariotti authored 10 months ago and Michele Cirinei committed 10 months ago

Check against the upper temperature limit (125 degrees C) before
consider the temperature valid.

REFERENCE:
https://git.toradex.com/cgit/linux-toradex.git/commit/drivers/thermal/imx8mm_thermal.c?h=toradex_5.15-2.2.x-imx&id=37fb4e13d221a281179cf2732dba7c4a212c4911

Gianfranco Mariotti authored 10 months ago and Michele Cirinei committed 10 months ago

The i.MX 8MP has a ADC_PD bit in the TMU_TER register that controls the
operating mode of the ADC:
* 0 means normal operating mode
* 1 means power down mode

When enabling/disabling the TMU, the ADC operating mode must be set
accordingly.

i.MX 8M Mini & Nano are lacking this bit.

REFERENCE:
https://git.toradex.com/cgit/linux-toradex.git/commit/drivers/thermal/imx8mm_thermal.c?h=toradex_5.15-2.2.x-imx&id=4c12feec2dfde62dea8dabe1d2dd78ee340ba048