Fixes: 944c01a8 ("spi: lpspi: enable runtime pm for lpspi")
Signed-off-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

set skip firmware bss flag when when driver clear firmware buffer.
If driver didn't clear the buffer, and the flag is set.
Something unexpected may happen.
So clear firmware buffer before download firmware every times.

Signed-off-by: ming_qian <ming.qian@nxp.com>

A fixed PLL PMS setting for attached panel is obviously not
enough for any other mipi panel which needs a different PLL
output clock frequency, and besides, for the CEA-861 standard
display modes, the 'pll_pms' table also can not cover all the
modes requirements. So a general way is created to solve this
problem which can provide an optimum solution to output a PLL
bit clock to match the request frequency in a maximum degree
and also satisfy the input clock and intermediate clocks limit
according to the PLL specification.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>

Add a new property 'pref-rate' support which can be used to
assign a different clock frequency for the DPHY PLL reference
clock in the dtb file. And if this property does not exist,
the default clock frequency for the reference clock will be
used. And according to the spec, the DPHY PLL reference clk
frequency should be in [6MHz, 300MHz] range.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>

When there is no existing horizontal blanking word counts in
'dsim_hblank_par' tables, these data requires to be computed
according to the 'hfp', 'hbp' and 'hsa' timings which are in
pixel unit. So the pixel unit data requires to be converted
to word count unit data correctly to match the PLL output clk
frequency.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>

Change the 'bit_clk' and 'pix_clk' fields of struct sec_mipi_dsim
and the 'bit_clk' field of struct dsim_pll_pms from 'uint64_t' type
to 'uint32_t' type, since first, these two fields are in KHz unit,
and so 32 bit unsigned integer is enough to hold the data values,
and second, use 32 bit integer can simplify related clocks compute.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>

on i.MX8

We need to add property in DTS node before when we want to use normal
mode on i.MX8 platform. Check in RM, we also can use CBT register not
must CTRL1 register to set bitrate for normal mode.

This patch intends to use CBT register to set bitrate for normal mode on
i.MX8. After this, we don't need to modify the DTS node to support
normal mode.

Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>

Remove the delay waiting, add the sync mechanism during partition reset.
In order to avoid the hang at master side during the rpmsg restore
procedure. Re-initialize the first_notify parameter, when rpmsg master
assumes remote processor is dead.
Otherwise, master side maybe hang during the rpmsg restore procedure
in some corner cases.
~14ms is required by M4 to process the MU message from the cold boot.
Set the max wait of MU_SendMessageTimeout to 20ms.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Robin Gong <yibin.gong@nxp.com>

Clear pending interrupt status of partition reboot during rpmsg
driver probe to avoid to unregister/register virtio device again.

Tested-by: Clark Wang <xiaoning.wang@nxp.com>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>

if seq header is not found before user streamoff.
and user streamon again.
the firmware is keeping parsing seq state.
but it don't really parse seq header
because it has been canceled by streamoff.
The firmware needs driver trigger again to start parse next seq.
In this case, driver will send stop cmd to firmware first,
and send start cmd to firmware to restart parse seq header.
And the user need transfer spspps before I frame again.

Signed-off-by: ming_qian <ming.qian@nxp.com>

Error implement in function CDN_API_DPTX_ForceLanes_blocking,
it should call function CDN_API_DPTX_ForceLanes.

Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>

in the former patch, the order of allocate dma buffer will be changed.
if there is no enough memory, some error may occur.
so revert the former change, and add lock for alloc and free dma

Signed-off-by: ming_qian <ming.qian@nxp.com>

Because we add the partition reboot function, and assign all flexcan
pins to M4, A core cannot access flexcan pins for now.

LPUART3 uses flexcan pins before, so disable it to avoid this error:
imx8qxp-pinctrl iomuxc: pin_config_set op failed for pin 110

Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>

after seek
    replace flush_drv_q() with clear_queue()

Signed-off-by: Shijie Qin <shijie.qin@nxp.com>

Add the model name accordingly for imx7ulp EVKB board since
the machine name and/or compatible may be used by user.

Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>

Add security setting check for socket interface since
stack will check the return value.

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>

commit 861cb5eb ("brcmfmac: Fix access point mode") upstream.

Since commit 1204aa17 ("brcmfmac: set WIPHY_FLAG_HAVE_AP_SME flag")
the Raspberry Pi 3 A+ (BCM43455) isn't able to operate in AP mode with
hostapd (device_ap_sme=1 use_monitor=0):

brcmfmac: brcmf_cfg80211_stop_ap: setting AP mode failed -52

So add the missing mgmt_stypes for AP mode to fix this.

Fixes: 1204aa17 ("brcmfmac: set WIPHY_FLAG_HAVE_AP_SME flag")
Suggested-by: Arend van Spriel <arend.vanspriel@broadcom.com>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Acked-by: Arend van Spriel <arend.vanspriel@broadcom.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>

Remove the quirk for disable cyw4356 D3 mode since current FW
already support it.
This revert the commit 28db0ac2("MLK-20716 PCI: add quirk for
cyw4356 to disable D3 mode")

Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>

This patch fixes 43455 CRC error while running throughput test with
suspend/resume stress test.

The continuous failure messages before system crash:
brcmfmac: brcmf_sdiod_sglist_rw: CMD53 sg block read failed -84
brcmfmac: brcmf_sdio_rxglom: glom read of 25600 bytes failed: -5
brcmfmac: brcmf_sdio_rxfail: abort command, terminate frame
brcmfmac: brcmf_sdiod_sglist_rw: CMD53 sg block read failed -84
brcmfmac: brcmf_sdio_rxglom: glom read of 24576 bytes failed: -5
brcmfmac: brcmf_sdio_rxfail: abort command, terminate frame

Signed-off-by: Wright Feng <wright.feng@cypress.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>

With asynchronous suspend/resume feature, suspend and resume callbacks to
be executed in parallel with each other. It makes bus changes the state to
BRCMF_BUS_DOWN before all brcmf_cfg80211_suspend IOVAR executions.
The same situation also happens in resume procedure and causes PM mode
keeps in PM_MAX after resume. In order to fix the race condition, We add
one second sleep in bus suspend and cfg80211 resume function.

Signed-off-by: Wright Feng <wright.feng@cypress.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>

We got ifp null pointer kernel panic in brcmf_txfinalize after removing
Wi-Fi USB dongle when data was transmitting, The root cause is that
interface was removed before calling brcmf_txfinalize in
brcmf_fws_dequeue_worker and finally caused kernel panic.

Signed-off-by: Wright Feng <wright.feng@cypress.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>

To trunkcate the addtional bytes, if extra bytes are received.
Current code only have a warning and proceed without handling it.
But in one crash dump reported by DVT, these causes the
crash intermittently. So the processing is limit to the skb->len.

Signed-off-by: Raveendran Somu <raveendran.somu@cypress.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>

    1. extend resolution change function
    2. change uFBCInUse to uActiveSeqTag in struct MediaIPFW_Video_SeqInfo

Signed-off-by: Shijie Qin <shijie.qin@nxp.com>

    1. refine code for set_pic_end_flag and clear_pic_end_flag
    2. Reduce 'find buffer NULL' printing level to prevent printing all the time when normal playing

Signed-off-by: Shijie Qin <shijie.qin@nxp.com>

Add dma support for lpspi0 and lpspi2 modules on i.MX8QXP board.

Ensure the lpspi does not use cs-gpio in slave mode.

Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>

Related issues have been fixed by (e0e542ae MLK-20060-1 spi: lpspi:
fix wrong transmission when don't use CONT). However, the delay between
sending and receiving in slave mode. This causes the value of
FSR_RXCOUNT cannot reflect whether there is still data not sent timely.
So do this judgement by FSR_TXCOUNT.

Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>

In order to prevent stall from happening during the system suspend operations,
the DPU KMS driver should use a freezable and unbound work queue for nonblock
commits to make sure all work items are drained in the freeze phase of the
suspend operations.  So, let's hook up a commit function of our own onto
->atomic_commit to replace the original one drm_atomic_helper_commit() which
uses the system_unbound_wq(unfreezable).  The new function is almost a copy
of drm_atomic_helper_commit() expect for the work queue replacement.

Note that other drivers which use drm_atomic_helper_commit() may have
the same problem during system suspend.  The right fix should be at the
DRM atomic core.  However, being conservative for now, it is okay to fix the
issue for this driver only.

Signed-off-by: Liu Ying <victor.liu@nxp.com>

In order to prevent stall from happening during the system suspend operations,
DPU KMS would use a freezable and unbound work queue for nonblock commits to
replace the original one in DRM atomic helper, that is, the unfreezable
system_unbound_wq.  This patch introduces such a work queue and makes it ready
to be used by the DPU KMS driver.

Signed-off-by: Liu Ying <victor.liu@nxp.com>

DPU KMS would use a freezable and unbound work queue for nonblock commits
to prevent stall from happening during the system suspend operations in the
coming commits.  In order to make sure DCSS KMS has the same nonblock commit
behaviour as before, the two drivers may have a work queue of their own
respectively.  So, let's make the work queues be driver specific.

Signed-off-by: Liu Ying <victor.liu@nxp.com>

We need to set parent clock for some audio clock in dts,
when the system enter suspend, the whole audio subsystem
may be power off, the parent setting should be lost, so
we need to set CLK_SET_PARENT_NOCACHE flag in imx_clk_mux_scu,
to let the operation of reset parent clock in
drivers/soc/imx/pm-domains.c take effect.

This issue only occurs on imx8qm, not on imx8qxp, for on imx8qxp
the ADMA subsystem don't enter power off, there is other
device in power on state in suspend.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>

It's caused by allocating and freeing dma buffer in the same time.
and there is no any protection for this case.
refine the driver to avoid this case.

destroy workqueue before release resource

Signed-off-by: ming_qian <ming.qian@nxp.com>

the api supplied by videobuf2 is not thread safe.
so in multi thread case, it may cause crash
refine the decoder driver, make sure the api are synchronized

Signed-off-by: ming_qian <ming.qian@nxp.com>

the api supplied by videobuf2 is not thread safe.
so in multi thread case, it may cause crash
refine the encoder driver, make sure the api are synchronized

Signed-off-by: ming_qian <ming.qian@nxp.com>

Change the log message to report "difference is" instead of "error is" to
avoid confusion. This message is just reports the actual pixel clock for
informational purposes. It is not an actual error.

Signed-off-by: Oliver Brown <oliver.brown@nxp.com>

mipid_hx8369_get_lcd_videomode and mipid_hx8369_lcd_setup are now exported
for the module build.

Signed-off-by: Oliver Brown <oliver.brown@nxp.com>

The reset needs to be set in phy_init to handle the warm reset case.

Signed-off-by: Oliver Brown <oliver.brown@nxp.com>

The resets need to be set in poweron to handle the warm reset case.

Signed-off-by: Oliver Brown <oliver.brown@nxp.com>

For some chips may need long time to get the response from M4 sometimes,
enlarge timeout to 500ms.

Add a judgement to check if the received data is the current transfer
wanted.

Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>

Change unsigned long to __u64 to align 32bit and 64bit kernel.

Change-Id: Id2e393812311c4556a31ff8ac83e4a4b5c8573f1
Signed-off-by: ivan.liu <xiaowen.liu@nxp.com>

For IPC communication, CPU will be busy polling MU RX channel
after sending IPC message if IPC response is needed, such
mechanism wastes too much CPU resource if SCU takes long time
to finish the IPC request, so now enable RX interrupt for IPC
response.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>