arm: dts: NALLINO: Activate SSC and assign PLL2_PFD1 as LCDIF clock parent

In order to jitter the Display the LCDIF clock need to be derived from
the PLL2 which supports Spread Spectrum clocking.

With this and the OS and RAM validation tests Spread Spectrum can be
generally used. Thus enable it by default.

BCS 746-000990