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Integrate linux-seco-mtk/oleksii/upstream-misc

GitBot requested to merge linux-seco-mtk/oleksii/upstream-misc into kirkstone

Commit: clea-os/bsp/mediatek/linux-seco-mtk@049a6a3a

GENIO: scsi: ufs: adjust log level for optional settings

Adjust the log level from info to dbg for the optional settings in order not to cause confusion.

Change-Id: Idf9c2d47b139ffae14504fa3f6562b16ca42f75c Signed-off-by: ht.lin ht.lin@mediatek.com

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Commit: clea-os/bsp/mediatek/linux-seco-mtk@589fd758

GENIO: drm: mediatek: hdcp: add hdcp and ca porting

Add the hdcp and ca porting, which is compatible with mt8195 and mt8188. A matching Trusted Application (TA) in OP-TEE should also be available to enable the HDCP function; otherwise, normal HDMI output will be displayed.

mtk_hdmi_ca.c and mtk_hdmi_ca.h Establish communication interfaces between mtk_hdmi_hdcp.c and the TA.

mtk_hdmi_hdcp.c, mtk_hdmi_hdcp.h Provide HDCP-related functions and APIs for the HDMI driver to enable HDCP.

mtk_hdmi_common.c and mtk_hdmi_common.h a. Add HDCP-related control flow. b. Export some orginally static functions for mtk_hdmi_hdcp.c usage.

mtk_mt8195_hdmi.c Add HDCP-related control flow.

mtk_mt8195_hdmi_ddc.c and mtk_mt8195_hdmi_ddc.h a. Add HDCP-related DDC control flow, especially hdmi_ddc_request. b. Export some orginally static functions for mtk_hdmi_hdcp.c usage.

mtk_mt8195_hdmi_regs.h add HDCP related registers and bit defines.

Add one configuration to enable the HDCP driver.

config DRM_MEDIATEK_HDMI_HDCP Select this option to enable the hdcp driver. If DRM_MEDTIATEK_HDMI is selected, then it can be chosen.

Change-Id: I2d9680e5ac63990891ac76c98176fba617d5531f Signed-off-by: Tommy Chen tommyyl.chen@mediatek.com

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Commit: clea-os/bsp/mediatek/linux-seco-mtk@7f3076a5

GENIO: panel: startek-kd070fhfid015: check panel prepared before updating backlight

The issue could be reproduced by get/set the panel brightness before the panel is being prepared:

cat /sys/devices/platform/soc/1c008000.dsi0/1c008000.dsi0.0/backlight/ 1c008000.dsi0.0/actual_brightness or echo 100 > /sys/devices/platform/soc/1c008000.dsi0/1c008000.dsi0.0/ backlight/1c008000.dsi0.0/brightness

after the above command, the dsi driver would show: [drm] Wait DSI IRQ(0x00000003) Timeout

and the panel won't be initialized successfully afterwards.

Therefore check if the panel is prepared before updating backlight

Change-Id: I2de61531b0b6f63ec36955de60b609795396605f Signed-off-by: Tommy Chen tommyyl.chen@mediatek.com

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Commit: clea-os/bsp/mediatek/linux-seco-mtk@cedc942b

GENIO: panel: startek-kd070fhfid015: remove panel if mipi_dsi_attach fails

The problem is the panel driver got -EPROBE_DEFER from dsi host which is not ready yet, but after defer probing the second time, finding the matching panel while attaching to the host is causing de-referencing error due to the un-removed panel of the previous one.

Therefore remove the panel if mipi_dsi_attach fails.

Change-Id: I3c3325853cacce889cfbdc1e8fcb43627072d931 Signed-off-by: Tommy Chen tommyyl.chen@mediatek.com

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Commit: clea-os/bsp/mediatek/linux-seco-mtk@a1370c87

arm: dts: mt8370: enable cec module

mt8370.dtsi: enable cec module. add interrupts, clocks, clock-names and hdmi phandle.

The cec is default enabled. It can be disabled by setting status = "disabled";

Change-Id: I8403ab3a8c409fe9fe67dc4ac8c4b5318d8c02c3 Signed-off-by: Tommy Chen tommyyl.chen@mediatek.com

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Commit: clea-os/bsp/mediatek/linux-seco-mtk@601b6ac5

arm: dts: mt8195: enable cec module

mt8195.dtsi: enable cec module. add interrupts, clocks, clock-names and hdmi phandle.

The cec is default enabled. It can be disabled by setting status = "disabled";

Change-Id: I9c43036437bd3306bdff98eb6f7e763cace60f57 Signed-off-by: Tommy Chen tommyyl.chen@mediatek.com

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Commit: clea-os/bsp/mediatek/linux-seco-mtk@8c3e4606

arm: dts: mt8188: enable cec module

mt8188.dtsi: enable cec module. add interrupts, clocks, clock-names and hdmi phandle.

The cec is default enabled. It can be disabled by setting status = "disabled";

Change-Id: If825f9baefaa32030ff47df76f3d187913f4838f Signed-off-by: Tommy Chen tommyyl.chen@mediatek.com

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Commit: clea-os/bsp/mediatek/linux-seco-mtk@46879469

GENIO: drm: mediatek: cec: add mtk_cec_v2 driver

Add the mtk_cec_v2 driver, which is compatible with mt8195 and mt8188.

There is an existing mtk_cec driver, which is compatimbe with mt8173. The new cec hw is not compatible to the existing mtk_cec driver, so add a new mtk_cec_v2 driver to separate into different versions of drivers.

Add two configurations to enable two CEC features.

config DRM_MEDIATEK_CEC Select this option to enable the mtk_cec_v2 driver. If DRM_MEDTIATEK_HDMI is selected, then it can be chosen.

config DRM_MEDIATEK_CEC_SUSPEND_LOW_POWER Select this option to disable the CEC clock when the platform enters suspend mode. It will not be possible to resume it via CEC commands.

Change-Id: I840f19626d31ea06e5555318877261ac46268a02 Signed-off-by: Tommy Chen tommyyl.chen@mediatek.com

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Commit: clea-os/bsp/mediatek/linux-seco-mtk@a781bdea

net: stmmac: mediatek: Disable the RX EEE function of the RTL PHY

[Detail] The enablement of the RX EEE feature within the RTL PHY is known to disrupt DMA initialization and software reset operations.

Consequently, to prevent such complications, this feature is disabled by default.

Change-Id: I801bd5d0f61906d94e6551c064bd7e41273a367d Signed-off-by: larry larry.li@mediatek.com

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Commit: clea-os/bsp/mediatek/linux-seco-mtk@2672e30f

net: stmmac: do not stop RX_CLK in RX LPI state for qcs404 SOC

[Detail] Currently in phy_init_eee() the driver unconditionally configures the PHY to stop RX_CLK after entering Rx LPI state. This causes an LPI interrupt storm on my qcs404-base board.

Change the PHY initialization so that for "qcom,qcs404-ethqos" compatible device RX_CLK continues to run even in Rx LPI state.

Change-Id: I69b7a6f11654997681545aeda9f3bc544ca82b06 Signed-off-by: larry larry.li@mediatek.com

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Commit: clea-os/bsp/mediatek/linux-seco-mtk@4936e666

Revert "GENIO: net: stmmac: disable stop rxc when enable EEE"

[Detail] This reverts commit "disable stop rxc when enable EEE"

Change-Id: Ic29a019f195fd79b65932f6603f88a48720dfe42 Signed-off-by: larry larry.li@mediatek.com

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Commit: clea-os/bsp/mediatek/linux-seco-mtk@0d8fd010

BACKPORT: UPSTREAM: dma-buf: fix racing conflict of dma_heap_add()

Racing conflict could be: task A task B list_for_each_entry strcmp(h->name)) list_for_each_entry strcmp(h->name) kzalloc kzalloc ...... ..... device_create device_create list_add list_add

The root cause is that task B has no idea about the fact someone else(A) has inserted heap with same name when it calls list_add, so a potential collision occurs.

Fixes: c02a81fba74f ("dma-buf: Add dma-buf heaps framework") Signed-off-by: Dawei Li set_pte_at@outlook.com Acked-by: Andrew Davis afd@ti.com Acked-by: Christian König christian.koenig@amd.com Signed-off-by: Sumit Semwal sumit.semwal@linaro.org Link: https://patchwork.freedesktop.org/patch/msgid/TYCP286MB2323873BBDF88020781FB986CA3B9@TYCP286MB2323.JPNP286.PROD.OUTLOOK.COM (cherry picked from commit 432e25902b9651622578c6248e549297d03caf66)

Backward porting the upstream patch to fix the racing conflict issue and solve the conflict with Commit 09ab1e697eb3 ("ANDROID: dma-heap: Refactor code to allow for future in-kernel users"). The function dma_heap_find() will increase the ref_count, so it shouldn't be used to check the dma-heap existence.

Change-Id: I8328cb3cf38508c639f29d269837356d253f77f6 Signed-off-by: Andy.Hsieh andy.hsieh@mediatek.com

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Commit: clea-os/bsp/mediatek/linux-seco-mtk@e034ec1a

GENIO: drm/mediatek: dp: call mtk_dp_init_port when HPD connect

call mtk_dp_init_port when HPD connect to reset DP encoder.

The original issue is related to playing back audio via DP. The problem reproducing procedue is

  1. playback audio with a Type-C to Type-C cable.
  2. stop the audio and switch the cable to a Type-C to HDMI hub.
  3. playback audio a noisy result occurs.

call mtk_dp_init_port when HPD connect could solve the problem.

Change-Id: Ib29422978a720413867e949a41c7bf9aab4d79e0 CR-Id: AUTO00286696 Signed-off-by: Tommy Chen tommyyl.chen@mediatek.com

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