LF-4255 spi: spi-nxp-fspi: Add quirk to disable DTR support

Not all platform currently supports octal DTR mode. This causes flash
probe failure and therefore, provide an option of quirk
NXP_FSPI_QUIRK_DISABLE_DTR for platforms not supporting DTR.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>

drivers/spi/spi-nxp-fspi.c

@@ -319,6 +319,9 @@
 /* access memory via IPS only due to this errata */
 #define NXP_FSPI_QUIRK_ERR050601	BIT(0)
 
+/* Disable Octal DTR */
+#define NXP_FSPI_QUIRK_DISABLE_DTR	BIT(1)
+
 struct nxp_fspi_devtype_data {
 	unsigned int rxfifo;
 	unsigned int txfifo;
@@ -331,7 +334,7 @@ static const struct nxp_fspi_devtype_data lx2160a_data = {
 	.rxfifo = SZ_512,       /* (64  * 64 bits)  */
 	.txfifo = SZ_1K,        /* (128 * 64 bits)  */
 	.ahb_buf_size = SZ_2K,  /* (256 * 64 bits)  */
-	.quirks = 0,
+	.quirks = NXP_FSPI_QUIRK_DISABLE_DTR,
 	.little_endian = true,  /* little-endian    */
 };
 
@@ -383,6 +386,11 @@ static inline int nxp_fspi_ips_access_only(struct nxp_fspi *f)
 	return f->devtype_data->quirks & NXP_FSPI_QUIRK_ERR050601;
 }
 
+static inline int nxp_fspi_disable_dtr(struct nxp_fspi *f)
+{
+	return f->devtype_data->quirks & NXP_FSPI_QUIRK_DISABLE_DTR;
+}
+
 /*
  * R/W functions for big- or little-endian registers:
  * The FSPI controller's endianness is independent of
@@ -484,7 +492,8 @@ static bool nxp_fspi_supports_op(struct spi_mem *mem,
 	    op->data.nbytes > f->devtype_data->txfifo)
 		return false;
 
-	if (op->cmd.dtr && op->addr.dtr && op->dummy.dtr && op->data.dtr)
+	if (!nxp_fspi_disable_dtr(f) &&
+		op->cmd.dtr && op->addr.dtr && op->dummy.dtr && op->data.dtr)
 		return spi_mem_dtr_supports_op(mem, op);
 
 	return spi_mem_default_supports_op(mem, op);