Integrate u-boot-mtk/relase-23-2
Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@65f547c3
dts:wilk: Transfer release-23.2 changes from genio-700-evk device tree
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@03e31980
Merge remote-tracking branch 'upstream/mtk-v2022.10' into relase-23-2
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@c58839fb
arm: dts: mt8370: add edp_tx device tree for bootlogo
genio-510-evk.dts: add edp_tx device tree and related gpio pins for bootlogo.
The edp_tx is default disabled. to enable edp_tx, set status = "okay" to the edp_tx node, and set status = "disabled" to the dsi0 node
Change-Id: I46da9f20457f98196540eaea64f8bf7365e79002 Signed-off-by: Tommy Chen tommyyl.chen@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@01d9dcf6
GENIO: board: mt8370: add edp panel driver
Add the edp panel auo_g156han03 driver to show the bootlogo on the Genio-510-EVK
Change-Id: I00f3b2a9d564edf11f27c81841474493b54412f2 Signed-off-by: Tommy Chen tommyyl.chen@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@66d1f98f
GENIO: genio-510-evk: enable edp bootlogo drivers
Since the Genio-510-EVK uses the same chip as the genio-700-evk, the eDP drivers can be reused.
Change-Id: I7a05482b0383e47b9980efb65117ccfcf6930736 Signed-off-by: Tommy Chen tommyyl.chen@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@845a597a
arm: dts: mt8195: add edp_tx device tree for bootlogo
genio-1200-evk.dts: add edp_tx device tree and related gpio pins for bootlogo.
The edp_tx is default disabled. to enable edp_tx, set status = "okay" to the edp_tx node, and set status = "disabled" to the dsi0 node
Change-Id: I4992c478fd49a4ab487721e6682fd9ccf7bbfa0b Signed-off-by: Tommy Chen tommyyl.chen@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@379fefe0
GENIO: board: mt8195: add edp panel driver
Add the panel innolux hk173vb_01b driver to show the bootlogo on the Genio-1200-EVK.
Change-Id: Ie8546c31a878686e3e5bee06b9aeb241d45853b6 Signed-off-by: Tommy Chen tommyyl.chen@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@7e04a779
GENIO: genio-1200-evk: edp boot logo vdosys and edp implementation
disp_reg_mt8195.h:
- add edp related register
- add more display register and bit defines vdosys_mt8195.c:
- add scenario to separate dsi and edp settings
- use defines when setting registers and values dp_mt8195.c: parameter init and clock settings
Change-Id: I3c193e19c399b73147c25f9a31930c87aa790cc4 Signed-off-by: Tommy Chen tommyyl.chen@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@b2b8fc90
arm: dts: mt8188: add edp_tx device tree for bootlogo
genio-700-evk.dts: add edp_tx device tree and related gpio pins for bootlogo.
The edp_tx is default disabled. to enable edp_tx, set status = "okay" to the edp_tx node, and set status = "disabled" to the dsi0 node
Change-Id: Ib791ec2214b297b88dc7aecb35cb8f2d241c754a Signed-off-by: Tommy Chen tommyyl.chen@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@f13d6a6e
GENIO: board: mt8188: add edp panel driver
Add the edp panel auo_g156han03 driver to show the bootlogo on the Genio-700-EVK
Change-Id: I33612023f6be7ef00401c31ef7b6b48f0802c622 Signed-off-by: Tommy Chen tommyyl.chen@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@0a1acee6
GENIO: genio-700-evk: edp boot logo vdosys and edp implementation
Common implementation: mtk_dp_common.c: common dp entrance and function mtk_dp_common.h: common dp header file mtk_dp_intf.c: dp interface driver mtk_dp_intf.h: dp interface header file mtk_dp_hal.c: dp tx hal driver mtk_dp_hal.h: dp tx hal header file mtk_dp_reg.h: dp register header file mtk_edp_panel.h: common edp panel header file
mt8188 chip dependent implementation: disp_reg_mt8188.h:
- add edp related register
- add more display register and bit defines vdosys_mt8188.c:
- add scenario to separate dsi and edp settings
- use defines when setting registers and values dp_mt8188.c: parameter init and clock settings
Change-Id: I0cafa002eac3f307472545507281f5334f04c184 Signed-off-by: Tommy Chen tommyyl.chen@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@7c304cac
GENIO: phy: phy-mtk-tphy: fix incorrect usage for clk_enable_bulk()
The defined clock source is not a clock bulk, revert previous patch and fix clock driver.
Signed-off-by: Macpaul Lin macpaul.lin@mediatek.com Change-Id: I685780bded1daa17dde45ca315a94907f23aa4d5
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@c58ed06d
arm: dts: mt8195: add apmixedsys-cg device node
Add apmixedsys clock gate for the CLK_APMIXED_PLL_SSUSB26M clock.
Change-Id: Ic451c16a7d6ab028024c52376b27dc95bf6789dd Signed-off-by: Chris-QJ Chen chris-qj.chen@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@066986fe
GENIO: clock: mediatek: mt8195: add ssusb26m clock in apmixedsys
Add support for SSUSB26M clock.
This commit introduces support for the CLK_APMIXED_PLL_SSUSB26M clock in the apmixed pll driver. The clock is defined and initialized in the apmixed_clks array using the GATE_APMIXED macro.
Change-Id: Ibe3d9fe6add12a8c543b396d4e65e332ada2ecf3 Signed-off-by: Chris-QJ Chen chris-qj.chen@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@023d108b
Revert "clock: mediatek: mt8195: add ssusb26m clock in apmixedsys"
This reverts commit 1bdde343fa8c8d5e42ad6f0ee3c097cd48e1181a.
Signed-off-by: Chris-QJ Chen chris-qj.chen@mediatek.com Change-Id: I5c632d809a1c71d5f5d64b3cc43abdc6bf53fd11
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@d6b61b7e
GENIO: genio-510-evk: fix dsi pwm driver incorrectly enable infra ao power
To enable disp_pwm1_cg for a DSI panel, set BIT(20) only to the register MODULE_SW_CG_3_CLR (0x100010C4), and it will clear BIT(20) of MODULE_SW_CG_3
However, if PWM_REG_SET_BITS is used to set BIT(20), it would read the value of MODULE_SW_CG_3_CLR, OR BIT(20), and write the resulting value back to MODULE_SW_CG_3_CLR. If there are values on other bits, the process of reading and writing back to MODULE_SW_CG_3_CLR means to clear those bits along with BIT(20).
For example, PWM_REG_SET_BITS(MODULE_SW_CG_3_CLR, BIT(20)) 1.read MODULE_SW_CG_3_CLR, get 0x31100000 2.0x31100000 | BIT(20) = 0x31100000 | 0x00100000 = 0x31100000 3.write 0x31100000 to MODULE_SW_CG_3_CLR, and make the result become 0x00000000 which means all CGs on MODULE_SW_CG_3 are enabled. The bit[29:27]should not be cleared.
So it should use PWM_REG_WRITE(MODULE_SW_CG_3_CLR, BIT(20)) before write the value is 0x31100000 after write the value is 0x31000000
Change-Id: I87bd48ddb0fed1d454af8fdb433bbcc088df6f3d Signed-off-by: Tommy Chen tommyyl.chen@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@44dfcb83
arm: dts: mt8195: add USB 3.0 PHY support for XHCI port1
This commit updates the device tree source for the MediaTek MT8195 SoC
to add support for USB 3.0 PHY. A new node usb3-phy@700 is added under
the phy node with the necessary properties including the
mediatek,force-mode property to enable forced mode in the PHY.
The mediatek,u3p-dis-msk property is removed which is no longer needed.
Change-Id: I061b8c0735c8b8eb886684007559ab61904ad181 Signed-off-by: Yow-Shin Liou yow-shin.liou@mediatek.com Signed-off-by: Macpaul Lin macpaul.lin@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@d0adc932
phy: phy-mtk-tphy: add support for forced mode in USB 3.0 PHY
This commit introduces the ability to force the USB 3.0 PHY into
USB specific mode. This is achieved by adding a new boolean field
type_force_mode in the mtk_phy_instance structure.
This field is set based on the "mediatek,force-mode" property
in the device tree.
In the u3_phy_instance_init() function if type_force_mode is true,
the PHY is switched to USB 3.0 mode by manipulating the
P3D_RG_SSUSB_PHY_MODE and P3D_RG_SSUSB_FORCE_PHY_MODEbits in the
U3P_U3_PHYD_TOP1 register.
Additionally, the clk_enable() function must be replaced by
clk_enable_bulk() function to enable the reference clock for
avoiding crash.
Change-Id: I015b1da4b2d78c88eb92062d66f47faf65022e67 Signed-off-by: Yow-Shin Liou yow-shin.liou@mediatek.com Signed-off-by: Macpaul Lin macpaul.lin@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@1bdde343
clock: mediatek: mt8195: add ssusb26m clock in apmixedsys
Add support for SSUSB26M clock.
This commit introduces support for the CLK_APMIXED_PLL_SSUSB26M clock in the apmixed pll driver. The clock is defined and initialized in the apmixed_clks array using the GATE_APMIXED macro.
Change-Id: I44438e2ef638a9e82ebc62fd7071d2e556b6d3dd Signed-off-by: Chris-QJ Chen chris-qj.chen@mediatek.com Signed-off-by: Macpaul Lin macpaul.lin@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@9969741b
arm: dts: mt8195: add eye diagram properties
add tuning properties
Change-Id: Ia806cc6bebf6ef3bf2e69b14e49dfe69ad3b0d6c Signed-off-by: Yow-Shin Liou yow-shin.liou@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@21692cc9
FROMLIST: dt-bindings: phy-mtk-tphy: add properties for phy tuning
Add properties to improve eye diagram which sometimes need adjust some parameters of u2phy; Add a property to tune disconnect threshold;
Change-Id: I3a66ce010c3fa4b262a35e23945600a377af4101 Signed-off-by: Chunfeng Yun chunfeng.yun@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@ca982db0
FROMLIST: phy: phy-mtk-tphy: add properties for phy tuning
Add properties to improve eye diagram which sometimes need adjust some parameters of u2phy; Add a property to tune disconnect threshold;
Change-Id: I7a1ca5c79bababc286c94760489484574f2f5165 Signed-off-by: Chunfeng Yun chunfeng.yun@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@f8aa32a9
GENIO: mt8370: enable bootlogo related def configs
a. Enable several mandatory configurations for the bootlogo. b. The default background is set to white. To change it to black, set CONFIG_SYS_WHITE_ON_BLACK = y.
Change-Id: I1619cd766bce135c400c4e9cf2ffa5199912f8e2 Signed-off-by: Tommy Chen tommyyl.chen@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@684e86fd
GENIO: mt8370: add bootlogo configs
a. Set splashsource as mmc_fs to read the logo file from an mmc_fs of an image partition. b. Set splashfile as logo.bmp to assign the logo file name. c. Set splashdevpart as bootassets to read the logo from the bootassets partition. d. Set splashpos as m,m to position the logo in the middle of the panel.
Change-Id: I1e86d1ae75fbcffa8e9c6233fcb3be4dab4fd6c0 Signed-off-by: Tommy Chen tommyyl.chen@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@23bacee4
arm: dts: mt8370: add dsi0 device tree for bootlogo
genio-510-evk.dts: add dsi0 device tree and related gpio pins for bootlogo.
Change-Id: I99fcb5f7102f1af9aa6381bdd93ce72ae2ec8cc7 Signed-off-by: Tommy Chen tommyyl.chen@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@25610609
GENIO: board: mt8370: add panel driver
Add the panel KD070FHFI-D078 driver to show the bootlogo on the Genio-510-EVK.
Change-Id: I32a8deca438c7ffe13c4496ccf1db15079f4c4e3 Signed-off-by: Tommy Chen tommyyl.chen@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@10890520
GENIO: genio-510-evk: enable dsi bootlogo drivers
Since the Genio-510-EVK uses the same chip as the genio-700-evk, the DSI drivers can be reused.
The issue with disp_pwm has also been resolved in this change. Initially, disp_pwm_mt8188.c used disp_pwm0, but it was found that disp_pwm1 is the correct PWM for the DSI panel. Therefore, disp_pwm1 should be used instead.
On the other hand, since neither the genio-700-evk nor the genio-510-evk have a clock driver in U-Boot, register control should still be used to enable the PWM clocks.
Change-Id: I1e29d72791eb73c60bb9cb4f19143157af4ee9b7 Signed-off-by: Tommy Chen tommyyl.chen@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@1f14f07b
arm64: dts: mt8370: genio-510-evk: fix memory to 4GB
Default memory size of Genio 510 EVK board is 4GB.
Signed-off-by: Macpaul Lin macpaul.lin@mediatek.com Change-Id: I2c38778ccfa1b3cd89e63b34e9592826a5fc5a6f
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@428034c7
GENIO: cmd: fdt: add support for flat device tree authentication
This allows using 'fdt authndtb ' command to authenticate the flat dtb and dtbo. This command also needs to enable 'CONFIG_FIT_SIGNATURE' support.
Change-Id: If061161e0a523f3abd23f01364262036ee1fe15d Signed-off-by: Howard Lin howard-yh.lin@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@d71342da
GENIO: configs: remove ubuntu specific defconfig
From IOT Yocto v23.1. boot method for Ubuntu is changed to UEFI and EBBR boot. So these settings for fitImage boot could be dropped.
Signed-off-by: Macpaul Lin macpaul.lin@mediatek.com Change-Id: Ieddf68c832661bebda0ec5073b5d49df520cd9e6
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@723829ce
GENIO: configs: genio_1200_evk_ufs: add dfu ufs support
Enable dfu ufs CONFIGS.
Change-Id: Ib50a68a389ff7b6e70ea342f7953695bc08a98f5 Signed-off-by: Howard Lin howard-yh.lin@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@4fafbbd5
GENIO: dfu: dfu_ufs: add the specific backend for DFU operation
This allows using DFU framework to read and write for UFS flash based storage.
Change-Id: I3354aff9f80c1de9a36e6e8b1e1b68b89291d252 Signed-off-by: Howard Lin howard-yh.lin@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@46df3309
GENIO: board: mt8195: add ufs support for firmware updates
This allows the ufs device to process firmware updates.
Change-Id: I43ca30b2c2310c46bb645fce1ae8021fe916d4aa Signed-off-by: Howard Lin howard-yh.lin@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@01a7b701
GENIO: boot: use the scsi device for AB firmware updates
When the 'CONFIG_UFS_MEDIATEK' is enabled, it will use the 'scsi' device to get partition information.
Change-Id: I6793ea63824c0f523e2a3f9fd4ccfa22b050ebdc Signed-off-by: Howard Lin howard-yh.lin@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@f04a6f7e
GENIO: boot: check boot control for AB firmware updates
This allows to ensure the boot control data is correct or it will print an error log.
Change-Id: I0deb97e67f691ad73965a7d837e72167b2c9cff6 Signed-off-by: Howard Lin howard-yh.lin@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@6b2d47a7
GENIO: board: mt8370: correct dfu parameter in capsule update info
Adjust the correct size of mmcpart for dfu parameter in capsule update information.
Change-Id: Ia090f7f5fdfd71173c86e5f2d44cd931eecea487 Signed-off-by: Howard Lin howard-yh.lin@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@e3182c8e
GENIO: board: mt8365: correct dfu parameter in capsule update info
Adjust the correct size of mmcpart for dfu parameter in capsule update information.
Change-Id: I91537d2d0c3a521668ab3e7cf12c9482597236a3 Signed-off-by: Howard Lin howard-yh.lin@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@b9b8e211
GENIO: board: mt8195: correct dfu parameter in capsule update info
Adjust the correct size of mmcpart for dfu parameter in capsule update information.
Change-Id: I35295a13183d5889edd70574f57b24359ae5c055 Signed-off-by: Howard Lin howard-yh.lin@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@1f870f69
GENIO: board: mt8188: correct dfu parameter in capsule update info
Adjust the correct size of mmcpart for dfu parameter in capsule update information.
Change-Id: I42d28d227e4cb11f71c515ac49c9f68d93585a9d Signed-off-by: Howard Lin howard-yh.lin@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@970d3ba6
GENIO: board: mt8370: remove the redundant mediatek_part_name()
The implementation of mediatek_part_name() is moved to common "cpu.c" for all MediaTek chips.
Change-Id: I357d2762119f3de9b4354dd19cdfd0b03357ea90 Signed-off-by: Howard Lin howard-yh.lin@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@20e744e6
GENIO: mmc: fix msdc cmd ready check
Correct the check condition in msdc_cmd_is_ready() for MSDC_PS_DAT0 polling.
Change-Id: If29f1dc5618c0f14791d014c8be1a6d26d975aab Signed-off-by: ht.lin ht.lin@mediatek.com
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Commit: seco-ne/3rd-party/u-boot/u-boot-mtk@0c23fba5
arm: dts: mt8365-pumpkin: set DRAM size to 2GB
[Problem]: Pumpkin G350 fails to boot at the u-boot stage and prints the DRAM size as 0 bytes. This is because the size is set to 3GB which is more than the available memory size.
[Solution]: Pumpkin G350 uses an LPDDR4 2GB DRAM. Set DRAM size to 2GB.
Change-Id: I99a792cf1f8eadbbaf543c7e81d8a79fcd968a8e Signed-off-by: Suhrid Subramaniam suhrid.subramaniam@mediatek.com