Replaced imx8mp-pinfunc.h and imx8mp.dtsi with the files provided
with the 5.15 kernel.

The devicetrees and includes have been copied from the
linux-5.10.9-guf branch.

Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>

This reverts commit 3d65a351.

The i.MX8MP A0 silicon will not be supported, so revert the SW workaround
for A0 to provide more robust & clean code support for i.MX8MP.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Tested-by: Jian Li <jian.li@nxp.com>

Add the wait mode workaround on i.MX8MP. it is just
a provisional patch for Alpha release. it will be
dropped in the future. As all the changes in this
patch need to be revered for that time, just including
all the changes of dts & driver in one patch to make
it more easier to track all the changes.

Coresight probe has some conlict with the IPI workaround.
it is meaningless to put effort on resolve such conflict,
and Coresight is not an must feature for Alpha release,
disable the Coresight support directly.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
(cherry picked from commit 3d65a351)

Add missing hsio power domain for usb nodes.

Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>

It is not necessary to add the clocks for ispdwp_pd, so remove
it.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Robby Cai <Robby.Cai@nxp.com>

Update DSP node according to dsp remoteproc definition, drop
the dts for support of compress playback but it can be supported
by SOF.

So for DSP we have two architecture currently, one is by remoteproc
another one is by SOF.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Peng Zhang <peng.zhang_8@nxp.com>

add more accurate compatible string for sai

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Peng Zhang <peng.zhang_8@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>

From ISP doc, it need four type clock. They are core, ahb, axi and
sensor clock. But driver miss sensor clock, so add it.

Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by  : Robby.Cai <robby.cai@nxp.com>
(cherry picked from commit 00b928f6)

ISP1/2 share the core/axi/ahb clock in mediamix
BIT13/14/15(ISP1_core/axi/ahb) should be reserved bits.

The patch fixed it.

Signed-off-by: Robby Cai <robby.cai@nxp.com>
Reviewed-by: G.n. Zhou <guoniu.zhou@nxp.com>
(cherry picked from commit c9f0d178)

Remove reserved memory for isp1 because now only use one isp0 for tuning tool.
The reserved memory is only used for tuning tool, could be removed for normal
operations.

Signed-off-by: Robby Cai <robby.cai@nxp.com>
Reviewed-by: G.n. Zhou <guoniu.zhou@nxp.com>
(cherry picked from commit 5f2220e87dd8a8fb86f524ea7945ab1d4155bc73)
(cherry picked from commit c375b5a0)

use memory-region to get reserved memory

Signed-off-by: Robby Cai <robby.cai@nxp.com>
Reviewed-by: Guoniu.zhou <guoniu.zhou@nxp.com>
(cherry picked from commit 5a28380ef4f4afffdabcfacd062706487cc150f8)
(cherry picked from commit b8f879b7)

Previously it controls dewarp in mipi driver which is not standard way.
Now use gpr to control dewarp in dewarp driver.

Signed-off-by: Robby Cai <robby.cai@nxp.com>
Reviewed-by: Guoniu.zhou <guoniu.zhou@nxp.com>
(cherry picked from commit 22373bd4b6979bc9c8e63b678bcd5204714fd4c9)
(cherry picked from commit 1076dd80)

update Dewarp power domain

Signed-off-by: Robby Cai <robby.cai@nxp.com>
Reviewed-by: Guoniu.zhou <guoniu.zhou@nxp.com>
(cherry picked from commit e6031680ba2d67a6961a5da5fc68a913962c66d2)
(cherry picked from commit a9ffd11b)

Set MIPI clock according to IC team.
for 1 ISP camera on CSI0, MIPI CSI clock set to 500MHz
for 2 ISP cameras on CSI0/CSI1, MIPI CSI clock both set to 266MHz

Signed-off-by: Robby Cai <robby.cai@nxp.com>
Reviewed-by: Guoniu.zhou <guoniu.zhou@nxp.com>
(cherry picked from commit a38f457b63fa8a0d9b4c5de39a12959c172e7e35)
(cherry picked from commit 3d78503e)

In order to be able to use NVMEM APIs to read soc unique ID, add the
nvmem data cell and name for nvmem-cells to the "soc" node, and add a
nvmem node which provides soc unique ID to efuse@30350000.

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
(cherry picked from commit 2007d101)

Since the i.MX8 RPMSG support had been switched to remote proc.
To clean up the codes, remove the local i.MX RPMSG supports.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Jun Li <jun.li@nxp.com>

move soc device into ocotp device node instead of the parent device
of the all devices which located in 'soc@0', otherwise, all probed
children devices will be reorder to dmp_list again once 'imx8mx-soc'
device defered probed, which may break driver suspend/resume sequece,
such as imx_spdif and fsl_spdif, hence the later would suspended before
the former and endless interrupt may never be handled since clock has
been disabled already in the later.

[    1.930598] calling  fsl_spdif_driver_init+0x0/0x20 @ 1
[    1.955712] initcall fsl_spdif_driver_init+0x0/0x20 returned 0 after 24512 usecs
[    1.981963] calling  imx_spdif_driver_init+0x0/0x20 @ 1
[    1.986600] initcall imx_spdif_driver_init+0x0/0x20 returned 0 after 4509 usecs
[    2.901408]   #0: imx-spdif
[   21.151529] fsl-spdif-dai 30090000.spdif: calling platform_pm_suspend+0x0/0x70 @ 470, parent: 30000000.bus
[   21.161189] fsl-spdif-dai 30090000.spdif: platform_pm_suspend+0x0/0x70 returned 0 after 0 usecs
[   21.474311] imx-spdif sound-spdif: calling platform_pm_suspend+0x0/0x70 @ 470, parent: platform
[   21.483024] imx-spdif sound-spdif: platform_pm_suspend+0x0/0x70 returned 0 after 9 usecs

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Alice Guo <alice.guo@nxp.com>

arm64: dts: imx8mq: fix typo

Signed-off-by: Robin Gong <yibin.gong@nxp.com>

Jailhouse Hypervsior virtual pci node use dt domains.
so also use dt domains for pci node, this will avoid conflict with
Jailhouse Hypervisor to trigger the following error:
	pr_err("Inconsistent \"linux,pci-domain\" property in DT\n");

Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>

add v4l2 vpu device node for imx8m platforms

Signed-off-by: Zhou Peng <eagle.zhou@nxp.com>
Reviewed-by: Shijie Qin <shijie.qin@nxp.com>

According iMX8MP formal datasheet, the clock rate of hdmi_apb
should set to 133MHz.

Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>

Set the PCIe CLKREQ# as input and add the num-viewport property for
i.MX8MP PCIe RC port.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Jun Li <jun.li@nxp.com>

In the i.MX8MP PCIe design, the PCIe PHY REF clock comes from external
OSC or internal system PLL. It is configured in the IOMUX_GPR14 register
directly, and can't be contolled by CCM at all.
So, correct it in the DTS node.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Jason Liu <jason.hui.liu@nxp.com>

Add nand support for i.MX8MP-DDR4-EVK board.

Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Reviewed-by: Han Xu <han.xu@nxp.com>

Already add mailbox channels for dsp node, not need mu clk anymore.

Signed-off-by: Zhang Peng <peng.zhang_8@nxp.com>

Add mailbox channels for dsp node.

Signed-off-by: Zhang Peng <peng.zhang_8@nxp.com>

When ISI output width more than 2048, it need to use adjacent channel
chain buffer to receive more data. For iMX865, clock for each channel
is independent, so need to enable the adjacent channel clock when the
channel0 chain buffer enabled. This is a workaround for IC issue.

Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>

it's swapped by 'git am' by mistake, this patch corrected this.

Signed-off-by: Robby Cai <robby.cai@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>

Adding "id" parameter in the ISP deivce nodes.

Signed-off-by: Oliver F. Brown <oliver.brown@nxp.com>

According to i.MX8MP Architecture Defition Document, the maximum
clock rate comes generated by 'ccm_media_disp2_pix_clk_root' is
160MHz, so 1039.5MHz clock rate is not supported. And besides,
this clock rate will be set to the matched rate with display mode
in lcdif driver, so it is not necessary to set its rate in its
assigned-clock-rates property, and just leave it to be 0.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>

Due to commit 26ef2488a2ef (MLK-24998-1 arm64: dts: imx8mp: correct
assigned-clock-rates for video_pll1), default 27MHz dsi PHY reference
clock cannot be derived from 'vide_pll1', so change to use osc_24m
for the clock source and use 12MHz for dsi reference clock rate, since
below usual DDR clock rates can be derived through 12MHz clock rate:

	891000,
	810000,
	792000,
	648000,
	472500,
	445500,
	390000,
	297000,
	240000,
	189000,

All these clock rates comes from ADV7535 bridge driver.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>

According to i.MX8MP Architecture Defition Document, the maximum
output frequency generated by video_pll1 is 1190MHz, so correct
its assigned-clock-rates to be 1039.5MHz to meet the spec.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>

Correct the pcie reg definitions, otherwise, they can't be parsed
properly. And correct the RESETs and clocks used by iMX865 PCIe.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>

Change to max frequency that defined in OD mode for higher performance.
G1: 800M
G2: 700M
VC8000E: 500M
VPU_BUS: 800M

Signed-off-by: Jian Li <jian.li@nxp.com>
Reviewed-by: Zhou Peng <eagle.zhou@nxp.com>
(cherry picked from commit 876a268f04a799b353eddd811a0bf18091d91fca)

use media_blk_ctrl to handle isp/dewarp core/axi/ahb clocks

Signed-off-by: Robby Cai <robby.cai@nxp.com>
Reviewed-by: G.n. Zhou <guoniu.zhou@nxp.com>

Remove fsl,xcvr-fw property from xcvr node in sync
with the upstream accepted driver version.

Signed-off-by: Viorel Suman <viorel.suman@nxp.com>

Commit bf1c9d8275ab(clk: imx8mp: Add media blk_ctrl clocks
and resets) has defined the resets in media block control.
So add 'resets' property to lcdif1 to make use of it for
IP reset.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>

Commit bf1c9d8275ab(clk: imx8mp: Add media blk_ctrl clocks
and resets) has defined new clocks in media block control.
So the DSI related clocks should be used for DSI.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>

Commit bf1c9d8275ab(clk: imx8mp: Add media blk_ctrl clocks
and resets) has defined new clocks in media block control.
So the lcdif2 related clocks should be used for lcdif2.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>