dts: Apply changes to mx8mp from 5.10 kernel

arch/arm64/boot/dts/seconorth/imx8mp.dtsi

@@ -1262,8 +1262,18 @@ mipi_dsi: mipi_dsi@32e60000 {
 					 <&media_blk_ctrl IMX8MP_CLK_MEDIA_BLK_CTRL_MIPI_DSI_CLKREF>;
 				clock-names = "cfg", "pll-ref";
 				assigned-clocks = <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
+#if 0
 				assigned-clock-parents = <&clk IMX8MP_CLK_24M>;
 				assigned-clock-rates = <12000000>;
+#else
+				assigned-clock-parents = <&clk IMX8MP_VIDEO_PLL1_OUT>;
+				//assigned-clock-rates = <12000000>;
+				pref-rate =     <13860>; // pll_out / 75
+				assigned-clock-rates = <13860000>;
+
+				//pref-rate =     <24750>; // pll_out / 42  // AN12940 sais D-PHY- ref_clk should be 24 - 300 MHz
+				//assigned-clock-rates = <24750000>;
+#endif
 				interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
 				power-domains = <&mipi_phy1_pd>;
 				status = "disabled";
@@ -2166,6 +2176,7 @@ usb_dwc3_0: usb@38100000 {
 				phys = <&usb3_phy0>, <&usb3_phy0>;
 				phy-names = "usb2-phy", "usb3-phy";
 				snps,dis-u2-freeclk-exists-quirk;
+				status = "disabled";
 			};
 
 		};
@@ -2178,6 +2189,7 @@ usb3_phy1: usb-phy@382f0040 {
 			assigned-clocks = <&clk IMX8MP_CLK_USB_PHY_REF>;
 			assigned-clock-parents = <&clk IMX8MP_CLK_24M>;
 			#phy-cells = <0>;
+			status = "disabled";
 		};
 
 		usb3_1: usb@32f10108 {