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Commit 463f7442 authored by Gagandeep Singh's avatar Gagandeep Singh Committed by Li Yang
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LF-5955: arm64: dts: ls1028a-rdb-dpdk: use SGMII in-band AN for eno0


Due to ERR050089 (MDIO register issue), Linux may not access the MDIO
controller concurrently with DPDK accessing an ENETC PF or VF.

If the user assigns all ports to DPDK via vfio-pci, DPDK could rely on PHY
initialization performed by Linux. But since the user is free to assign
only a subset of ENETC ports to DPDK, this means that when DPDK is
expected to run, Linux cannot be allowed to access the MDIO controller
at all.

Therefore, the DPDK device tree relies on PHY initialization done by the
bootloader.

However, Linux probes the ENETC ports, performs a PCIe FLR and this
changes PCS settings. Therefore, while DPDK inherits PHY initialization
from U-Boot, it inherits PCS initialization from Linux.

Prior to commit 71b77a7a ("enetc: Migrate to PHYLINK and PCS_LYNX"),
the driver used to enable in-band autoneg in the PCS unconditionally.
Whereas with phylink support, in-band autoneg is enabled when
'managed = "in-band-status"' is present, disabled otherwise. For
traffic to pass, the in-band setting on the PCS must be kept in sync
with the in-band setting on the PHY, and that means we must keep the
"in-band-status" property.

However, it is illegal to have both a "managed" and a "fixed-link" stanza,
because phylink errors out:

[    8.368016] fsl_enetc 0000:00:00.0: enabling device (0400 -> 0402)
[    8.378604] fsl_enetc 0000:00:00.0: can't use both fixed-link and
		in-band-status
[    8.396208] fsl_enetc: probe of 0000:00:00.0 failed with error -22

The DPDK device tree avoided this issue by deleting the
"phy-connection-type" property, which made the Linux driver operate in a
"PHY-less PF" mode where it did not register with phylink at all.
This operating mode is not actually functional, since Linux is not able
to pass traffic using it, and recently was removed upstream.

We must choose a configuration that works for both DPDK and for Linux
(with the assumption that an initial PHY configuration was done by
U-Boot). This is to use phylink and the Lynx PCS driver to enable in-band
autoneg, which will automatically adapt the MAC link speed to what was
negotiated on the copper side by the Atheros PHY (which is invisible to
Linux). This operating mode is identical to what we do for Felix switch
ports when DPDK is in use.

Note that it isn't necessary to delete the MDIO bus per se, as long as no
Ethernet port is connected to a PHY on this bus. MDIO reads are initiated
at runtime only by the PHY library, and the PHY library only runs when
initiated by an Ethernet port.

Signed-off-by: default avatarGagandeep Singh <g.singh@nxp.com>
Reviewed-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: default avatarLi Yang <leoyang.li@nxp.com>
parent 91a8d53c
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......@@ -9,14 +9,8 @@
#include "fsl-ls1028a-rdb.dts"
&enetc_port0 {
/* Leave the port with SGMII in-band autoneg enabled */
/delete-property/ phy-handle;
/delete-property/ phy-connection-type;
/delete-node/ mdio;
fixed-link {
speed = <1000>;
full-duplex;
};
};
/delete-node/ &enetc_mdio_pf3;
......
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