arm:dts:nallino: add parallel display support

Hard code timings for the FX050053DSSWBG01 display, which is used on
NALLINO S 5.0 OF PCT device out of box, in device tree.

arch/arm/boot/dts/seconorth/imx6ull-nallino.dts

@@ -47,8 +47,10 @@ aliases {
 		rtc0 = &rtc;
 		rtc1 = &snvs_rtc;
 	};
-	
-	backlight: backlight {
+
+	mxcfb {}; // needed for kernel flavor detection. see prepare-xml2dto.sh.
+
+	backlight {
 		compatible = "pwm-backlight";
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_bl_on>;
@@ -64,25 +66,6 @@ gfplatdetect: gfplatdetect {
 		compatible = "guf,imx6ull-platdetect";
 	};
 
-	panel: panel {
-		compatible = "guf,panel-dt";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_lcd_enable>;
-		enable-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>;
-		backlight = <&backlight>;
-		status = "disabled";
-
-		// The flags are not set by gfxml2dto yet
-		// so hardcode them for now
-		bus-flags = <0x04>;
-
-		port {
-			panel_in: endpoint {
-				remote-endpoint = <&display_out>;
-			};
-		};
-	};
-
 	regulators {
 		compatible = "simple-bus";
 		#address-cells = <1>;
@@ -241,7 +224,7 @@ eeprom: eeprom@50 {
 		bus-id = <0>;
 		flags = <0x80>; /* AT24_FLAG_ADDR16 */
 	};
-	
+
 	pmic: pf1550@8 {
 		compatible = "fsl,pf1550";
 		reg = <0x08>;
@@ -599,7 +582,7 @@ pinctrl_lcd_enable: lcdeneablegrp {
 				MX6UL_PAD_NAND_WP_B__GPIO4_IO11		0x80000000
 			>;
 		};
-		
+
 		pinctrl_bl_on: blongrp {
 			fsl,pins = <
 				MX6UL_PAD_NAND_READY_B__GPIO4_IO12	0x80000000
@@ -686,14 +669,34 @@ MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00      0x80000000 /*PF1550 INT*/
 &lcdif {
 	assigned-clocks = <&clks IMX6UL_CLK_LCDIF_PRE_SEL>;
 	assigned-clock-parents = <&clks IMX6UL_CLK_PLL5_VIDEO_DIV>;
+
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_lcdif_dat
-				 &pinctrl_lcdif_ctrl>;
+		     &pinctrl_lcdif_ctrl>;
+	display = <&display0>;
 	status = "okay";
 
-	port {
-		display_out: endpoint {
-			remote-endpoint = <&panel_in>;
+	display0: displ {
+		bits-per-pixel = <24>;
+		bus-width = <24>;
+
+		display-timings {
+			native-mode = <&timing0>;
+			timing0: timing0 {
+				clock-frequency = <29232000>;
+				hactive = <800>;
+				vactive = <480>;
+				hfront-porch = <40>;
+				hback-porch = <40>;
+				hsync-len = <48>;
+				vback-porch = <29>;
+				vfront-porch = <13>;
+				vsync-len = <3>;
+				hsync-active = <1>;
+				vsync-active = <1>;
+				de-active = <1>;
+				pixelclk-active = <1>;
+			};
 		};
 	};
 };