arm64:dts:tr8p: Fix flexcan nodes

arch/arm64/boot/dts/seconorth/trizeps8plus.dtsi

@@ -575,6 +575,23 @@ &wdog1 {
 	status = "okay";
 };
 
+&flexcan1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_flexcan1>;
+	//xceiver-supply = <&reg_can1_stby>;
+	status = "okay";
+};
+
+&flexcan2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_flexcan2>;
+	//xceiver-supply = <&reg_can2_stby>;
+	//pinctrl-assert-gpios = <&pca6416 3 GPIO_ACTIVE_HIGH>;
+	//status = "disabled";/* can2 pin conflict with pdm: gpio low select pdm, gpio high select can2 */
+	status = "okay";
+
+};
+
 &i2c1 { /* I2C on SODIMM 94,96 */
 	clock-frequency = <400000>;
 	pinctrl-names = "default";
@@ -767,12 +784,6 @@ gpio_mcu: tr8mcu-gpios {
 	};
 };
 
-&flexcan1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_flexcan1>;
-	status = "okay";
-};
-
 &iomuxc {
 	pinctrl-names = "default";
 
@@ -1057,8 +1068,21 @@ pinctrl_sd_vsel: sdvselgrp {
 
 	pinctrl_flexcan1: flexcan1grp {
 		fsl,pins = <
-			SPIN97_CAN1_RX	0x00000106
-			SPIN99_CAN1_TX	0x00000106
+			MX8MP_IOMUXC_SAI5_RXD1__CAN1_TX		0x154
+			MX8MP_IOMUXC_SAI5_RXD2__CAN1_RX		0x154
+		>;
+	};
+
+	pinctrl_flexcan1_reg: flexcan1reggrp {
+		fsl,pins = <
+			MX8MP_IOMUXC_SPDIF_EXT_CLK__GPIO5_IO05	0x154	/* CAN1_STBY */
+		>;
+	};
+
+	pinctrl_flexcan2: flexcan2grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_SAI5_MCLK__CAN2_RX		0x154
+			MX8MP_IOMUXC_SAI5_RXD3__CAN2_TX		0x154
 		>;
 	};
 };