- Jan 26, 2009
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Wolfram Sang authored
Signed-off-by:
Wolfram Sang <w.sang@pengutronix.de> Signed-off-by:
Jean Delvare <khali@linux-fr.org>
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- Jan 06, 2009
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David Brownell authored
Generalize the old at91rm9200 "bootstrap" bitbanging SPI master driver as "spi_gpio", so it works with arbitrary GPIOs and can be configured through platform_data. Such SPI masters support: - any number of bus instances (bus_num is the platform_device.id) - any number of chipselects (one GPIO per spi_device) - all four SPI_MODE values, and SPI_CS_HIGH - i/o word sizes from 1 to 32 bits; - devices configured as with any other spi_master controller When configured using platform_data, this provides relatively low clock rates. On platforms that support inlined GPIO calls, significantly improved transfer speeds are also possible with a semi-custom driver. (It's still painful when accessing flash memory, but less so.) Sanity checked by using this version to replace both native controllers on a board with six different SPI slaves, relying on three different SPI_MODE_* values and both SPI_CS_HIGH settings for correct operation. [akpm@linux-foundation.org: cleanups] Signed-off-by:
David Brownell <dbrownell@users.sourceforge.net> Acked-by:
Magnus Damm <damm@igel.co.jp> Tested-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- Aug 05, 2008
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Shadi Ammouri authored
This adds an SPI driver for the SPI controller found in various Marvell Orion ARM SoCs. It currently supports only one slave, which must use SPI mode 0. [dbrownell@users.sourceforge.net: cleanups, meet specs, pass "sparse"] Signed-off-by:
Shadi Ammouri <shadi@marvell.com> Signed-off-by:
Saeed Bishara <saeed@marvell.com> Signed-off-by:
Lennert Buytenhek <buytenh@marvell.com> Signed-off-by:
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- Feb 06, 2008
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Magnus Damm authored
Add support for SPI over SCI pins. SCI is a very simple serial controller block that can be found on older SuperH processors. In theory it is possible to use the SCI hardware block in syncronous mode, but this version of the driver simply hooks up the bit banging code on the SCI pins. Signed-off-by:
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- Jul 17, 2007
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Atsushi Nemoto authored
This is a driver for SPI controller built into TXx9 MIPS SoCs. This driver is derived from arch/mips/tx4938/toshiba_rbtx4938/spi_txx9.c. Signed-off-by:
Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by:
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Samuel Ortiz authored
Add OMAP24XX McSPI (Multichannel SPI) controller driver. This driver is tested very well under OMAP GIT tree with N800 - Nokia Internet Tablet, and some other OMAP2 boards. Recent updates included bugfixes, cleanups, speedups, and better conformance to the current SPI programming interface. This doesn't yet understand the third controller instance on the OMAP 2430. [david-b@pacbell.net: more minor cleanups to the omap2_mcspi driver] Signed-off-by:
Juha Yrjölä <juha.yrjola@solidboot.com> Signed-off-by:
Trilok Soni <soni.trilok@gmail.com> Signed-off-by:
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Andrei Konovalov authored
Simple SPI master driver for Xilinx SPI controller. No support for multiple masters. Not using level 1 drivers from EDK. [akpm@linux-foundation.org: uninlining] Signed-off-by:
Yuri Frolov <yfrolov@ru.mvista.com> Signed-off-by:
Andrei Konovalov <akonovalov@ru.mvista.com> Cc: Kumar Gala <galak@gate.crashing.org> Cc: David Brownell <david-b@pacbell.net> Signed-off-by:
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Ben Dooks authored
Add support for the Infineon TLE62x0 series of low-side driver chips, such as the TLE6220 or TLE6230. These can be viewed as output GPIOs specialized for power switching applications. The driver provides a userspace interface to those GPIOs, and to the switch status they provide. Signed-off-by:
Ben Dooks <ben-linux@fluff.org> Signed-off-by:
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Kaiwan N Billimoria authored
This adds a driver for the LM70-LLP parport adapter, which is an eval board for the LM70 temperature sensor. For those without that board, it may be a simpler example of a parport-to-SPI adapter then spi_butterfly. Signed-off-by:
Kaiwan N Billimoria <kaiwan@designergraphix.com> Doc, coding style, and interface updates; build fixes. Minor rename. Signed-off-by:
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- May 11, 2007
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Dragos Carp authored
SPI master driver for MPC52xx using its Programmable Serial Controller. Signed-off-by:
Dragos Carp <dragos.carp@toptica.com> Signed-off-by:
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- May 08, 2007
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Jan Nikitenko authored
Here is a driver for the Alchemy au1550 PSC (Programmable Serial Controller) in SPI master mode. It supports dma transfers using the Alchemy descriptor based dma controller for 4-8 bits per word SPI transfers. For 9-24 bits per word transfers, pio irq based mode is used to avoid setup of dma channels from scratch on each number of bits per word change. Tested with au1550; this may also work on other MIPS Alchemy cpus, like au1200/au1210/au1250. Used extensively with SD card connected via SPI; this handles 8.1MHz SPI clock transfers using dma without any problem (the highest SPI clock freq possible with au1550 running on 324MHz). The driver supports sharing of SPI bus by multiple devices. All features of Alchemy SPI mode are supported (all SPI modes, msb/lsb first, bits per word in 4-24 range). As the SPI clock of the controller depends on main input clock that shall be configured externally, platform data structure for au1550 SPI controller driver contains mainclk_hz attribute to define the input clock rate. From this value, dividers of the controller for SPI clock are set up for required frequency. Signed-off-by:
Jan Nikitenko <jan.nikitenko@gmail.com> Whitespace and section fixups. Remove partial workaround for platform setup bug in dma_mask setup; it couldn't work with multiple controllers. Signed-off-by:
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Andrea Paterniani authored
Add a filesystem API for <linux/spi/spi.h> stack. The initial version of this interface is purely synchronous. dbrownell@users.sourceforge.net: Cleaned up, bugfixed; much simplified; added preliminary documentation. Works with mdev given CONFIG_SYSFS_DEPRECATED; and presumably udev. Updated SPI_IOC_MESSAGE ioctl to full spi_message semantics, supporting groups of one or more transfers (each of which may be full duplex if desired). This is marked as EXPERIMENTAL with an explicit disclaimer that the API (notably the ioctls) is subject to change. Signed-off-by:
Andrea Paterniani <a.paterniani@swapp-eng.it> Signed-off-by:
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- May 07, 2007
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Wu, Bryan authored
This patch implements the driver necessary use the Analog Devices Blackfin processor's SPI Port. Signed-off-by:
Bryan Wu <bryan.wu@analog.com> Cc: David Brownell <david-b@pacbell.net> Signed-off-by:
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- Feb 14, 2007
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Haavard Skinnemoen authored
Driver for the Atmel on-chip SPI master controller. Tested primarily on AVR32/AT32AP7000/ATSTK1000 using mtd_dataflash and the jffs2 filesystem. Should also work fine on various AT91 ARM-based chips like AT91SAM926x and AT91RM9200. Hardware documentation can be found in the AT32AP7000 data sheet, or its AT91 siblings, which can be downloaded from http://www.atmel.com/dyn/products/datasheets.asp?family_id=682 Signed-off-by:
Haavard Skinnemoen <hskinnemoen@atmel.com> Signed-off-by:
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- Feb 12, 2007
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David Brownell authored
This is adds a simple SPI EEPROM driver, providing access to the EEPROM through sysfs much like the I2C "eeprom" driver ... except this driver supports write access, and multiple EEPROM sizes. From: "Tuppa, Walter" <walter.tuppa@siemens.com> Since I have EEPROMs on SPI with different address sizing, I made some changes to your at25.c to support them. Works perfectly. (Also includes a small bugfix for the "what size address" test.) Signed-off-by:
Walter Tuppa <walter.tuppa@siemens.com> Signed-off-by:
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Andrea Paterniani authored
Add the SPI controller driver for Freescale i.MX(S/L/1). Main features summary: > Per chip setup via board specific code and/or protocol driver. > Per transfer setup. > PIO transfers. > DMA transfers. > Managing of NULL tx / rx buffer for rd only / wr only transfers. This patch replace patch-2.6.20-rc4-spi_imx with the following changes: > Few cosmetic changes. > Function map_dma_buffers now return 0 for success and -1 for failure. > Solved a bug inside spi_imx_probe function (wrong error path). > Solved a bug inside setup function (bad undo setup for max_speed_hz). > For read-only transfers, always write zero bytes. This is almost the same as the 'BIS' version sent by Andrea, except for updating the 'DUMMY' byte so that read-only transfers shift out zeroes. That part of the API changed recently, since some half duplex peripheral chips require that semantic. Signed-off-by:
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David Brownell authored
This adds a SPI driver for the Microwire controller on OMAP1 chips. This driver has been used in the Linux-OMAP tree for some time now, including with some of those displays using standardized 9-bit commands followed by data with 8-bit words. Microwire only supports half duplex transfers, but that's all that most SPI protocols need. When full duplex, or higher speeds, are needed there are several other controllers that can be used on OMAP. [akpm@osdl.org: cleanups] Signed-off-by:
Imre Deak <imre.deak@solidboot.com> Signed-off-by:
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- May 21, 2006
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Ben Dooks authored
Hardware based SPI driver for Samsung S3C24XX SoC systems Signed-off-by:
Andrew Morton <akpm@osdl.org> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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Ben Dooks authored
SPI driver for SPI by GPIO on the Samsung S3C24XX series of SoC processors. Signed-off-by:
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Kumar Gala authored
This driver supports the SPI controller on the MPC83xx SoC devices from Freescale. Note, this driver supports only the simple shift register SPI controller and not the descriptor based CPM or QUICCEngine SPI controller. Signed-off-by:
Kumar Gala <galak@kernel.crashing.org> Signed-off-by:
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- May 16, 2006
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Stephen Street authored
This driver turns a PXA2xx synchronous serial port (SSP) into a SPI master controller (see Documentation/spi/spi_summary). The driver has the following features: - Support for any PXA2xx SSP - SSP PIO and SSP DMA data transfers. - External and Internal (SSPFRM) chip selects. - Per slave device (chip) configuration. - Full suspend, freeze, resume support. Signed-off-by:
Stephen Street <stephen@streetfiresound.com> Signed-off-by:
Greg Kroah-Hartman <gregkh@suse.de>
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- Jan 14, 2006
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David Brownell authored
This collects some small SPI patches that seem to be missing from the MM tree: - spi_butterfly kbuild hooks got dropped somehow; this restores them - quick fix for a (theoretical?) m25p80_write() oops noted by Andrew - quick fix for a potential config-specific oops for mtd_dataflash() - minor doc tweaks Signed-off-by:
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David Brownell authored
This adds a bitbanging spi master, hooking up to board/adapter-specific glue code which knows how to set and read the signals (gpios etc). This code kicks in after the glue code creates a platform_device with the right platform_data. That data includes I/O loops, which will usually come from expanding an inline function (provided in the header). One goal is that the I/O loops should be easily optimized down to a few GPIO register accesses, in common cases, for speed and minimized overhead. This understands all the currently defined protocol tweaking options in the SPI framework, and might eventually serve as as reference implementation. - different word sizes (1..32 bits) - differing clock rates - SPI modes differing by CPOL (affecting chip select and I/O loops) - SPI modes differing by CPHA (affecting I/O loops) - delays (usecs) after transfers - temporarily deselecting chips in mid-transfer A lot of hardware could work with this framework, though common types of controller can't reach peak performance without switching to a driver structure that supports pipelining of transfers (e.g. DMA queues) and maybe controllers (e.g. IRQ driven). Signed-off-by:
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David Brownell authored
This is the core of a small SPI framework, implementing the model of a queue of messages which complete asynchronously (with thin synchronous wrappers on top). - It's still less than 2KB of ".text" (ARM). If there's got to be a mid-layer for something so simple, that's the right size budget. :) - The guts use board-specific SPI device tables to build the driver model tree. (Hardware probing is rarely an option.) - This version of Kconfig includes no drivers. At this writing there are two known master controller drivers (PXA/SSP, OMAP MicroWire) and three protocol drivers (CS8415a, ADS7846, DataFlash) with LKML mentions of other drivers in development. - No userspace API. There are several implementations to compare. Implement them like any other driver, and bind them with sysfs. The changes from last version posted to LKML (on 11-Nov-2005) are minor, and include: - One bugfix (removes a FIXME), with the visible effect of making device names be "spiB.C" where B is the bus number and C is the chipselect. - The "caller provides DMA mappings" mechanism now has kerneldoc, for DMA drivers that want to be fancy. - Hey, the framework init can be subsys_init. Even though board init logic fires earlier, at arch_init ... since the framework init is for driver support, and the board init support uses static init. - Various additional spec/doc clarifications based on discussions with other folk. It adds a brief "thank you" at the end, for folk who've helped nudge this framework into existence. As I've said before, I think that "protocol tweaking" is the main support that this driver framework will need to evolve. From: Mark Underwood <basicmark@yahoo.com> Update the SPI framework to remove a potential priority inversion case by reverting to kmalloc if the pre-allocated DMA-safe buffer isn't available. Signed-off-by:
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