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Integrate u-boot-seco-rk/seco_2017.09_d23

GitBot requested to merge u-boot-seco-rk/seco_2017.09_d23 into kirkstone

Commit: edgehog/bsp/rockchip/u-boot-seco-rk@d7326b5c

[D23] [BOARD] Fix the array index out of bounds.

Add the REVC2 and the corresponding EEPROM address macros. Populate the addr_list array with all missing EEPROM addresses, so that the array index does not go out of bounds.

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Commit: edgehog/bsp/rockchip/u-boot-seco-rk@67ef3ff7

[D23] [DTS] Keep a single reference to the pinctrl node

Merge two pinctrl nodes into one and remove the commented sdmmc_pwr pinctrl node.

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Commit: edgehog/bsp/rockchip/u-boot-seco-rk@8ba7c165

[D23] [DTS] PMIC RK809 and regulators nodes refactoring

Change the PMIC name and compatible property to match the scheme. Add vcc5v0_sys regulator-fixed node from which the various power supplies will be generated by PMIC. PMIC node configuration based on stable kernel device tree file. Add io_domains nodes, with properties taken from the stable kernel.

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Commit: edgehog/bsp/rockchip/u-boot-seco-rk@d46f68a4

[D23] [DTS] eMMC/SD nodes properties revision

Move pinctrl property to SoC dtsi file from board dts. SD card detection is not supported, so overwrite the pinctrl property of SD node in board dts file without sdmmc_det. Remove cd-gpios, as gpio0 RK_PA3 pin is used by IO_EXP_INT. Remove properties not used by drivers (ignore-pm-notify, supports-sd/emmc, sd-uhs-sdrX) remove u-boot,dm-pre-reloc from emmc node, as it exists in seco-px30-u-boot.dtsi. Remove the unsupported mmc-hs200-1_8v property.

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Commit: edgehog/bsp/rockchip/u-boot-seco-rk@318ce671

[D23] [BOARD] Apply a few fixes to the implementation

Add board revision defines to be used throughout the code. By getting a valid eeprom address on the i2c bus, we fetch revision of the board and the MAC address. A RTC may be at the valid address 0x51 instead of EEPROM, then in the board_code() function continue to iterate the eeprom addresses until a valid eeprom address is found.

In the setup_macaddr function to get the eeprom device use board_code() return value.

Join two cases where the mac address could be programmed incorrectly using the logical OR operator.

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Commit: edgehog/bsp/rockchip/u-boot-seco-rk@265728f0

[D23] [BOARD] Fix indentation and remove the commented code.

To make the code more readable remove the commented-out code and fix indentation.

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Commit: edgehog/bsp/rockchip/u-boot-seco-rk@1126fa12

[D23] [DTS] Configure external clock source for GMAC node

Add gmac_clkin as a parent to SCLK_GMAC to switch GMAC to external clock. The KSZ8091RNA is configured to RMII in 25 MHz clock mode (a 25 MHz crystal connected to XI, XO (Pins 8, 7)). Override the clock frequency property of gmac_clkin node with 25MHz. The KSZ8091RNA will generate 50 MHz RMII reference clock output for the MAC.

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Commit: edgehog/bsp/rockchip/u-boot-seco-rk@69c02a33

[D23] [DEFCONFIG] Enable PHY_MICREL support

According to the scheme we have the KSZ8091RNAIA Ethernet transceiver of Micrel interfaced to PX30 RMII. Disable Texas Instruments Ethernet PHYs support (PHY_TI).

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Commit: edgehog/bsp/rockchip/u-boot-seco-rk@98f46b93

[D23] [DEFCONFIG] Enable NET_RANDOM_ETHADDR

When EEPROM is not well programmed to get MAC address from, it is better to have this CONFIG enabled to set ethaddr.

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Commit: edgehog/bsp/rockchip/u-boot-seco-rk@947c6227

[D23] [BOARD] Keep default fdt_file name for booting

Comment out the setting of a board revision id suffix in the default fdt_file name.

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Commit: edgehog/bsp/rockchip/u-boot-seco-rk@9123b4c1

[D23] [TOOLS] Increase the SPL image size.

From u-boot-seco-rk build log: Warning: SPL image is too large (size 0x3000) and will not boot

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