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Integrate u-boot-seco-imx/davc/c72_support

GitBot requested to merge u-boot-seco-imx/davc/c72_support into kirkstone

Commit: edgehog/bsp/nxp/u-boot-seco-imx@3666c9f2

[C72][DP83867] Enable support for primary ETH I/F

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Commit: edgehog/bsp/nxp/u-boot-seco-imx@a7e4bc48

[C72][REFACTORING] Remove warning massage due to CONFIGs redefiniction

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Commit: edgehog/bsp/nxp/u-boot-seco-imx@772346aa

[C72][QSPI] Enable support for Macronix MX25U6435F

Detection Test:

u-boot seco c72=> sf probe SF: Detected mx25u6435f with page size 256 Bytes, erase size 4 KiB, total 8 MiB

Read/Write/Compare Test: run fdt_load2ram sf probe sf erase 0 0x100000 sf write ${fdt_loadaddr} 0 ${filesize} sf read ${kernel_loadaddr} 0 ${filesize} cmp ${fdt_loadaddr} ${kernel_loadaddr} ${filesize}

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Commit: edgehog/bsp/nxp/u-boot-seco-imx@6f1e46a7

[C72][ENVIRONMENT] Enable mmcautodetect and fdtautodetect function

As for all other boards, the mmc device ID detection has been enabled. In this way, the source for kernel/dtb and rootfs is automatically set at runtime with the boot device. So, if the board boots from eMMC, all other components of the BSP will be picked up from the eMMC; if the boot is performed from uSD, the source device for the BSP will be the uSD.

Environment variables involved: kernel_device_id fdt_device_id ramfs_device_id rootfs_device_id

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Commit: edgehog/bsp/nxp/u-boot-seco-imx@3f07993c

[C72][USDHC] Fix indexing of USDHC devices (eMMC and uSD)

This patch fixs as follow:

  • eMMC with ID 0;
  • uSD with ID 1;

Before the index of the device followed the USDH controller ID (2 for eMMC and 1 for the uSD). For all Seco boards the convention is to place the eMMC (or all other device on board) with the lowest ID.

---------------------- LOG BEFORE THE PATCH ---------------------- Boot from eMMC

U-Boot SPL 2020.04-00114-g94baf038c4 (Jun 18 2021 - 15:25:04 +0200) power_bd71837_init C72 nano is 1GB DDRINFO: start DRAM init DDRINFO: DRAM rate 2400MTS DDRINFO:ddrphy calibration done DDRINFO: ddrmix config done Normal Boot Trying to boot from BOOTROM image offset 0x8000, pagesize 0x200, ivt offset 0x0

U-Boot 2020.04-00114-g94baf038c4 (Jun 18 2021 - 15:25:04 +0200)

CPU: i.MX8MNano DualLite rev1.0 1500 MHz (running at 1200 MHz) CPU: Commercial temperature grade (0C to 95C) at 47C Reset cause: POR Model: SECO i.MX8MNano C72 board DRAM: 1 GiB MMC: FSL_SDHC: 1, FSL_SDHC: 2 Loading Environment from MMC... OK Fail to setup video link In: serial Out: serial Err: serial

BuildInfo:

  • ATF 70fa7bc
  • U-Boot 2020.04-00114-g94baf038c4

switch to partitions #0, OK mmc2(part 0) is current device flash target is MMC:2 Net: eth0: ethernet@30be0000 Fastboot: Normal Normal Boot Hit any key to stop autoboot: 0

u-boot seco c72=> mmc dev 1 switch to partitions #0, OK mmc1 is current device u-boot seco c72=> mmc info Device: FSL_SDHC Manufacturer ID: 3 OEM: 5744 Name: WP32G Bus Speed: 50000000 Mode: SD High Speed (50MHz) Rd Block Len: 512 SD version 3.0 High Capacity: Yes Capacity: 29.7 GiB Bus Width: 4-bit Erase Group Size: 512 Bytes

u-boot seco c72=> mmc dev 2 switch to partitions #0, OK mmc2(part 0) is current device u-boot seco c72=> mmc info Device: FSL_SDHC Manufacturer ID: 70 OEM: 100 Name: M6270 Bus Speed: 200000000 Mode: HS400ES (200MHz) Rd Block Len: 512 MMC version 5.1 High Capacity: Yes Capacity: 3.5 GiB Bus Width: 8-bit DDR Erase Group Size: 512 KiB HC WP Group Size: 4 MiB User Capacity: 3.5 GiB Boot Capacity: 2 MiB ENH RPMB Capacity: 512 KiB ENH

u-boot seco c72=> mmc list FSL_SDHC: 1 (SD) FSL_SDHC: 2 (eMMC)

---------------------- LOG AFTER THE PATCH ---------------------- Boot from eMMC

U-Boot SPL 2021.04-00294-g0a5befaf38-dirty (Aug 03 2023 - 09:38:13 +0000) power_bd71837_init C72 nano is 1GB DDRINFO: start DRAM init DDRINFO: DRAM rate 2400MTS DDRINFO:ddrphy calibration done DDRINFO: ddrmix config done Normal Boot Trying to boot from MMC1 NOTICE: BL31: v2.4(release):lf-5.10.52-2.1.0-rc2-0-gbb4957067 NOTICE: BL31: Built : 04:45:39, Sep 8 2021

U-Boot 2021.04-00294-g0a5befaf38-dirty (Aug 03 2023 - 09:38:13 +0000)

alloc space exhausted CPU: i.MX8MNano DualLite rev1.0 at 1200 MHz Reset cause: POR Model: SECO i.MX8MNano C72 board Watchdog enabled DRAM: alloc space exhausted 1 GiB MMC: FSL_SDHC: 1, FSL_SDHC: 0 Loading Environment from MMC... OK Fail to setup video link In: serial Out: serial Err: serial

BuildInfo:

  • ATF bb49570

switch to partitions #0, OK mmc1 is current device DSI bridge NOT found! flash target is MMC:1 Net: eth0: ethernet@30be0000 Fastboot: Normal Normal Boot Hit any key to stop autob

u-boot seco c72=> mmc dev 0 switch to partitions #0, OK mmc0(part 0) is current device u-boot seco c72=> mmc info Device: FSL_SDHC Manufacturer ID: 70 OEM: 100 Name: M6270 Bus Speed: 200000000 Mode: HS400ES (200MHz) Rd Block Len: 512 MMC version 5.1 High Capacity: Yes Capacity: 3.5 GiB Bus Width: 8-bit DDR Erase Group Size: 512 KiB HC WP Group Size: 4 MiB User Capacity: 3.5 GiB Boot Capacity: 2 MiB ENH RPMB Capacity: 512 KiB ENH Boot area 0 is not write protected Boot area 1 is not write protected

u-boot seco c72=> mmc dev 1 switch to partitions #0, OK mmc1 is current device u-boot seco c72=> mmc info Device: FSL_SDHC Manufacturer ID: 3 OEM: 5744 Name: WP32G Bus Speed: 50000000 Mode: SD High Speed (50MHz) Rd Block Len: 512 SD version 3.0 High Capacity: Yes Capacity: 29.7 GiB Bus Width: 4-bit Erase Group Size: 512 Bytes

u-boot seco c72=> mmc list FSL_SDHC: 1 (SD) FSL_SDHC: 0 (eMMC)

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