Integrate meta-seco-rk/u-boot-seco_2017_09_next/seco_2017.09_next_c31
Integrate u-boot-seco-rk/seco_2017.09_next_c31
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[CMD] include watchdog.h in seco_config_lib
Add missing include for watchdog.h in seco_config_lib.
The watchdog is not reset while waiting for user input, so after a few seconds the system reboots.
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[DRIVERS][RK3399] fix handling of rgmii modes and delays
This commit:
- adds handling of the rgmii-id mode which disables both external delays in the gmac
- fixes the rk3399_gmac_set_to_rgmii function which should disable RX delay and/or TX delay on the gmac if they are set to -1 (as the rk3588 function does for example); instead, currently, the function still enables the delays and writes -1 (11111111) as a delay value, which is the max value
- simplify the switch/case in the probe function which currently contains some duplicated code
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[C31][DTS] fix ethernet delays
The current ethernet configuration sets delays in both MAC and PHY. This requires to alter the drivers to allow forcing both delays, which is unnecessary.
This commit sets mode to rgmii-id and sets internal delays to tx=2.75ns and rx=1.75ns. How these values were calculated: the RK3399 gmac is capable of a ~5ns delay. The rx_delay and tx_delay properties can have values 0-100, so one step is ~0.05ns.
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[C31] increase number of video output to 4 to enable TypeC-DP
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[C31] avoid redefining mmc_get_env_dev if CONFIG_ENV_IS_IN_MMC is not defined
Avoid redefining mmc_get_env_dev if CONFIG_ENV_IS_IN_MMC is not defined
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[C31] add 12 video configurations
Using intercompatible overlays we can obtain 12 different video configuration with 8 overlays:
- no display
- HDMI-4K
- eDP-1920x1080
- LVDS-1920x1080
- TypeC-DP-4K
- HDMI-4K + LVDS-1920x1080
- HDMI-4K + eDP-1920x1080
- HDMI-4K + TypeC-DP-1080p
- TypeC-DP-4K + HDMI-1080p
- TypeC-DP-4K + LVDS-1920x1080
- TypeC-DP-4K + eDP-1920x1080
- eDP-1920x1080 + LVDS-1920x1080
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[CMD] Change getline function's behavior for fix input size
Usually the number of items of a single menu in seco_config command is less than ten but in some cases this number increases and an char input is replaced with a string input. In order to obtain the same user experience in both cases (selection from a list less of ten and more of nine) a check on this number has been introduced and a number of max characher to expect in input is passed to the getline function. With the commit also the getline function has been changed in order to receive as argument this number of maximum character to read.
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[C31] call autoset_boot_device only if CONFIG_SECO_ENV_AUTOSET is defined
Call autoset_boot_device only if CONFIG_SECO_ENV_AUTOSET is defined
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[C31] add gpio overlay for cn52
Add overlay to use serial outputs on CN52 as GPIOs
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[C31] add flash option to seco_config
Add option to enable flash on spi1 to seco_config
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[C31][UART] add option for RS-485 uart on CN52
Add option to select RS-485 mode for CN52 UART
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[C31][OVERLAY] add option RTC for SPI2 in seco_config
Add option to enable RTC on SPI2 present in certain configurations
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[C31] [CONFIGS] Fix typo in ENV_UENV_FILE_NAME macro definition
in macro ENV_UENV_FILE_NAME definition should be mentioned the name of the SBC-C31.
Suggested-by: Michele Cirinei michele.cirinei@seco.com
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[C31] [DTS] Add PCI-e configuration
Add PCI-e configuration for the second Ethernet connection using Intel (R) I210 family Gigabit Ethernet controller interfaced to Rockchip processor PCI-e.
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[C31] [DEFCONFIG] Enable Intel(R) 1000 family adapter support
Optionally C31 SBC could have an Ethernet connection using Intel I210 Family Gigabit Ethernet controller interfaced to Rockchip processors PCI-e
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[C31] [BOARD] Add method to probe PCIe device on board_init
Add function that will probe PCIE device INTEL_I210_COPPER. This will make it available for use as a network interface on boot.
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[C31] [DEFCONFIG] Disable support of using kernel dtb in U-Boot
Disable USING_KERNEL_DTB support, developed by Rockchip, use device tree files only from the U-Boot source.
Also remove CONFIG_ROCKCHIP_EARLY_DISTRO_DTB and CONFIG_ROCKCHIP_EARLY_DISTRO_DTB_PATH which are now redundant since they depend from USING_KERNEL_DTB.
Suggested-by: Michele Cirinei michele.cirinei@seco.com
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[C31] [BOARD] Fix implicit declaration of function warnings
Add includes:
- stdlib.h for atoi function
- asm/arch/param.h for param_parse_bootdev function Call setup_seco_environment in the same condition how this function was declared
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[DRIVERS] gpio_watchdog: Add hw_watchdog_disable function
When we need to disable the watchdog during development, this function is useful, i.e. in case a kernel watchdog driver is in progress.
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[C31][DTS] add pinctrl for PHY reset pin in gmac node
Add pinctrl for PHY reset pin in gmac node.
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[C31] [DTS] Fix GMAC RGMII pinctrl conflicting with I2C5_SCL
Applied when USING_KERNEL_DTB is not enabled. GMAC pinctrl configuration '3 RK_PB3 RK_FUNC_1' conflicts with '3 RK_PB3 RK_FUNC_2' of I2C5_SCL. When GMAC is activated, I2C5 stops working and then PCAL6416.
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[C31] [BOARD] Add hardware watchdog support for TPS3851
Add necessary configurations to support hardware watchdog: (timeout 7795 ms):
- define WDT enable and trigger GPIOs in board header
- call hw_watchdog_init() from board_init.
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[DRIVERS] gpio_watchdog: Add checks on gpio_request errors.
Add wdt_enabled flag to check in hw_watchdog_reset before calling gpio_set_value.
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[DRIVERS] gpio_watchdog: use __udelay() instead of udelay() in hw_watchdog_reset
The hw_watchdog_reset function calls mdelay which calls udelay which in turn calls hw_watchdog_reset. So to eliminate this circular dependency, the __mdelay function has been introduced which calls directly __udelay without resetting the watchdog as udelay did.
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[BACKPORT] watchdog: Fix undefined reference to `hw_watchdog_reset'
Define WATCHDOG_RESET empty function in case of SPL_BUILD && !SPL_WATCHDOG_SUPPORT to fix error "undefined reference to hw_watchdog_reset".
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[C31] [DEFCONFIG] Enable GPIO_WATCHDOG support for TPS3851
SBC-C31 has TPS3851 voltage supervisor with integrated watchdog. GPIO_WATCHDOG which selects HW_WATCHDOG support is sufficient to manage its pins (WDI and SET1) and have basic watchdog functionality
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[C31] [CONFIGS] Add CAN devices in peripheral devices environment setup
Add CAN over SPI device tree overlays in seco_config peripheral devices setup.
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[C31] [CONFIGS] Add configuration for HDMI with resolution up to 4K
Add configuration for HDMI supporting resolution up to 4K in seco_config video setup.
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[C31] [CONFIGS] Add board configuration for seco_config command
Enable SECO_ENV_MANAGER to add seco_config command. Enable OF_LIBFDT_OVERLAY to add fdt overlay along the seco environment manager. Add board env_conf.h header with data configurations for the supported boot devices (eMMC, uSD, USB) and video setup. Add setup_seco_environment() function with board boot devices data passed.
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[C31] [BOARD] [DEFCONFIG] Boot/Environment device setup
Enable CONFIG_ENV_IS_IN_MMC for set/get environment in mmc Get the device environment in runtime or via CONFIG_SYS_MMC_ENV_DEV macro value if it exists. In misc_init_r function add autoset_boot_device() function to set boot device.
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[C31] [CONFIGS] Add the boot environment configurations
Add seco_environment header and necessary macros. Values are based on stable u-boot version 2017.09
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[C31] [BOARD] Set the Ethernet MAC address from I2C EEPROM
Enable SECO_ENV_AUTOSET to have a set of common functions of the Seco boards (i.e. get_macaddress_from_eeprom() function). In the setup_macaddr() function change the way to get the Ethernet MAC address retrieving it from the I2C EEPROM.
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[C31] [DEFCONFIG] Enable I2C_EEPROM driver
Enable the i2c_eeprom driver for device Atmel 24AA025
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[C31][DTS] Add i2c4 device node with EEPROM child node
Add eeprom device node for Atmel 24AA025 to have the eeprom in the DM tree for further needs (i.e. MAC address to retrieve).
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[C31] [DEFCONFIG] Enable ROCKCHIP_EARLY_DISTRO_DTB support
This enables loading dtb from distro bootable partition, searched in the defined path.
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[C31] [DTS] Add HDMI support configuration
Enable HDMI using the VOP little
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[DRIVERS] rockchip_display: Fix getting CRTC ID
Different SoCs in its dts have different VOP node structure rk3568 in vop node has both ports and port nodes and port has reg property, but rk3399 has only port node without reg property. To set right value in the register that selects vop little or big, in case of rk3399 we need to go up to remote endpoint node to get CRTC ID from its reg property, otherwise function return 0 and there is no possibility to use VOP little.
Credits to https://github.com/JeffyCN This commit based on: commit: ed7979939a7749025a7e20bebaf8b36c76bd5d27 Authored-by: Damon Ding damon.ding@rock-chips.com Date: Tue, 4 Jan 2022 11:32:53 +0800 Subject: [PATCH] drm/rockchip: display: modify the compatibility of get_crtc_id()
vopb/vopl/vop doesn't has the node of vpx in dts, but vop2 does. link: https://github.com/JeffyCN/mirrors/commit/ed7979939a7749025a7e20bebaf8b36c76bd5d27
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[C31] [DTS] GMAC: Add PHY internal delay and FIFO depth properties
Set FIFO depth to DP83867_PHYCR_FIFO_DEPTH_8_B_NIB as PHY Control Register (PHYCR), at Address 0x0010, bit [15:14] set: => mdio read ethernet@fe300000 9.0x0010 Reading from bus ethernet@fe300000 PHY at address 9: 9.16 - 0xc040 TX FIFO Depth: 11 = 8 bytes Set ti,tx-internal-delay and ti,rx-internal-delay to DP83867_RGMIIDCTL_1_NS as in U-Boot stable version.
it would be better to pass these properties using the child node phy@9 passed to the gmac node as value of the phy-handle property, but the driver PHY is not brought into the driver model, that's why DP83867 won't find these properties in the phy node, so keep those properties in gmac node
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[DRIVERS] clk_rk3399: GMAC: Add support for internal clock source (from CRU)
In function rk3399_gmac_set_clk internal clock support is left not implemented. Add an implementation based on another Rockchip SoC clock drivers, taken as an example.
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[C31] [DTS] Change GMAC clock source
Remove the clkin_gmac node, as the clock is generated internally from CRU. In the rk3399 clock driver this clock setting is currently not supported and to be implemented further.
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[C31] [DEFCONFIG] Enable NET_RANDOM_ETHADDR
During development when the EEPROM is not well programmed to get the MAC address from, this CONFIG had better be enabled to set ethaddr.
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[C31] [DEFCONFIG] Enable PHY_TI support
According to the scheme we have the DP83867CRRGZR Physical Layer transceiver of Texas Instuments.
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[C31] [DTS] PMIC RK808 and regulators nodes refactoring
From the i2c0 node remove properties that are not supported by the i2c driver. Fix PMIC interrupt line property Add regulator nodes as in stable kernel release version 4.19
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[C31] [DTS] Fix the basic eDP LCD panel configuration and keep it disabled
Fix the basic configuration of the eDP LCD panel according to the hardware design and disable it until further consideration.
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[C31] [DTS] Regulators refactoring
Remove vdd_center pwm-regulator node as it will be provided by PMIC. Remove vcc5v0_typec1 node as it is not in the design. Add regulators for USB 2.0, USB 3.0 and USB type C power enable. Fix regulators gpio property according to the scheme.
Add pinctrl nodes for regulators gpio.
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[C31][DTS][DEFCONFIG] Enable support for PCAL6416A IO expander
Add IO expander PCAL6416A device node and enable its driver Required when USING_KERNEL_DTB is disabled. Add include rockchip-pinconf.dtsi, for missing pin config (i.e pcfg_output_low/high).
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[C31] [DTS] Remove RK key node 1
Remove rk_key node 1 as it's not in the design.
Keep rk_key0 is kept because while it's not a physical button, it is present as a connector on which buttons can be plugged, it can be used to change the u-boot behavior as in the demo boards.
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[C31] [DEFCONFIG] Set DEBUG_UART_CLOCK to 14745600 Hz
The baud rate is derived from this clock by dividing it using this formula: baud rate = (serial clock freq) / (16 * divisor) divisor UART_DLL configured to 8 (to get baud rate = 115200 bps). Set BAUDRATE to 115200 bps
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[C31] Add base support files for SBC-C31 based on RK3399
Add base support files for Seco SBC-C31 based on Rockchip RK3399 SoC. Source obtained in the next steps:
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Copy files from RK3399 EVB: arch/arm/dts/rk3399-evb.dts -----------> arch/arm/dts/seco-rk3399-c31.dts configs/rk3399_defconfig -----------> configs/seco_rk3399_c31_defconfig board/rockchip/evb_rk3399/ -----------> board/seco/rk3399_c31/ include/configs/evb_rk3399.h -----------> include/configs/seco_rk3399_c31.h
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Fix names from RK3399 EVB to Seco RK3399 C31
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Add rules to add SBC-C31 into source tree to build