Integrate u-boot-seco-rk/ap/e09-fix-power-eth
[E09][DTS] configure ethernet leds
Configure mode and polarity of ethernet LEDs considering that, in E09 RevA, there are two hardware bugs:
- Left LEDs (orange=1Gbps, green=100Mbps) are swapped
- Right LED (activity) is active low
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[DRIVERS] Enable support for setting up DP83867 leds
Based on kernel commit https://git.seco.com/edgehog/bsp/rockchip/linux-seco-rk/-/commit/36e6025f973d3f312544bb4aa99001c42a23989d?merge_request_iid=51
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[E09][DTS] fix ethernet delays
Fix ethernet delays computed in kernel with phy_lb_scan utility:
echo 1000 > /sys/devices/platform/fe010000.ethernet/phy_lb_scan
Also:
- set "rgmii" mode and remove internal delays
- remove 100 Mbps speed limit
- align assigned-clock-parents to kernel dts
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[DRIVERS] net: phy: dp83867: rework delay rgmii delay handling
Based on this commit: https://git.seco.com/edgehog/bsp/nxp/u-boot-seco-imx/-/commit/20f7ea4c35ff98003c29eec442700af04496b49f
Based on commit c11669a2757e ("net: phy: dp83867: Rework delay rgmii delay handling") of mainline linux kernel.
The current code is assuming the reset default of the delay control register was to have delay disabled. This is what the datasheet shows as the register's initial value. However, that's not actually true: the default is controlled by the PHY's pin strapping.
This patch:
- insures the other direction's delay is disabled If the interface mode is selected as RX or TX delay only
- validates the delay values and fail if they are not in range
- checks if the board is strapped to have a delay and is configured to use "rgmii" mode and warning is generated that "rgmii-id" should have been used.
Signed-off-by: Grygorii Strashko grygorii.strashko@ti.com Acked-by: Joe Hershberger joe.hershberger@ni.com
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[DRIVERS] net: phy: dp83867: switch to use ofnode api
Switch to use more generic ofnode API instead of FDT API.
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[E09][DTS] add power domain configuration
Add configuration of io-domain power domains