Integrate linux-seco-imx/add_d18_mv
Commit: clea-os/bsp/nxp/linux-seco-imx@54b1a42e
[D18][DTBO] Add overlay for I2C MXT touch controller
--
Commit: clea-os/bsp/nxp/linux-seco-imx@bf69e136
[D18][DTBO] Add overlay for I2C Ilitek touch controller
--
Commit: clea-os/bsp/nxp/linux-seco-imx@3f3afc88
[D18][DTBO] Add overlay for I2C EETI touch controller
--
Commit: clea-os/bsp/nxp/linux-seco-imx@c927c3b7
[D18][DTBO] Add overlay for FG0700 7-inch display
--
Commit: clea-os/bsp/nxp/linux-seco-imx@9f1b14a5
[D18][DTBO] Add overlay for G101EAN02 10.1-inch display
--
Commit: clea-os/bsp/nxp/linux-seco-imx@37b96593
[D18][MV] Add overlay for Modular Vision carrier board
--
Commit: clea-os/bsp/nxp/linux-seco-imx@ddf806e4
[DRIVER][PCA953X] Disable input latching for level interrupts
For level interrupts, the latching of the inputs is rather unwanted. The latching might lead to false interrupt states which occur if the input changes again before the interrupt is completely processed. This can either be resolved by reading the input status register twice or by disabling the latching for level interrupt pins. Without the latching, very short level interrupt changes are ignored. Since we don't want them anyway, we opt for the second solution.
--
Commit: clea-os/bsp/nxp/linux-seco-imx@1e7b10e0
[DRIVER][PCA953X] Add level interrupt support
This adds level interrupt support to the pca953x driver. In the IRQ routine, the input status register is compared to the irq_trig_level_high and irq_trig_level_low parameters. If the value from the input status register aligns with one of the parameters, a level interrupt is issued. After processing all nested interrupts, the pending function is called again, to determine if the level interrupt condition is still active. If this is the case, the nested interrupts are processed again.
--
Commit: clea-os/bsp/nxp/linux-seco-imx@360332ed
[DRIVER][PCA953X] Workaround for int status race condition
Reading the input status register resets the interrupt status register. If an interrupt from the GPIO-Expander to the SoC is issued and an additional GPIO read occurs at the same time, the GPIO read might reset the interrupt status register (by reading the input status register). The IRQ routine of the GPIO-Expander is then unable to determine on which input an interrupt occurred. To prevent this from happening, the interrupt status register is read before each read of the input status register and the result is saved for later processing. In the IRQ routine, the current interrupt status register value is then combined with the stored value.