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Integrate linux-seco-imx/seco_lf-5.10.y-pll14xx-ssc

GitBot requested to merge linux-seco-imx/seco_lf-5.10.y-pll14xx-ssc into kirkstone

Commit: https://git.seco.com/edgehog/bsp/nxp/linux-seco-imx/-/commit/d813184831022751d67b82e293d15342f2f701ad

[DRIVER] clk: imx: pll1443x: add PLL SCCG support

anatop node: dts properties:

  • anatop-<$1>,sscg-enable
    • type: boolean
    • <$1>: PLL clk name
    • description: enable SSCG
  • anatop-<$1>,mfr
    • type: u32
    • <$1>: PLL clk name
    • description: modulation frequency factor value
  • anatop-<$1>,mfr
    • type: u32
    • <$1>: PLL clk name
    • description: modulation range factor value
  • anatop-<$1>,sel-pf
    • type: u32
    • <$1>: PLL clk name
    • description: modulation method control value

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Commit: https://git.seco.com/edgehog/bsp/nxp/linux-seco-imx/-/commit/a1e1cc59737c70d07e9f12b39b9fa9fb79cf9e5e

[DRIVER] clk: imx: pll14xx: fix and use macros for FDIV_CTL regs

Correct the definitions of "Divide and Fraction Data Control" registers, and use them in the appropriate code sections.

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