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Commit 61a5d2c5 authored by Nicola Sparnacci's avatar Nicola Sparnacci Committed by Michele Cirinei
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[SANTINO] Remove Ethernet-related unused functions

Remove from the board file the Ethernet-related function inherited from
the NXP reference project.
parent d2d993ce
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1 merge request!145[SANTINO] Add support to Santino board
......@@ -155,7 +155,6 @@ enum mxc_clock usdhc_clk[CONFIG_SYS_FSL_USDHC_NUM] = {
MXC_ESDHC4_CLK
};
struct usdhc_l usdhc_list_spl[CONFIG_SYS_FSL_USDHC_NUM] = {
{usdhc2_pads, ARRAY_SIZE(usdhc2_pads)/2, USDHC2_CD_GPIO, USDHC2_WP_GPIO},
{usdhc4_pads, ARRAY_SIZE(usdhc4_pads)/2, -1, IMX_GPIO_NR(7, 0)}
......@@ -221,56 +220,9 @@ int board_mmc_init( struct bd_info *bis ) {
#endif
#endif
static int ar8031_phy_fixup(struct phy_device *phydev)
{
unsigned short val;
/* To enable AR8031 ouput a 125MHz clk from CLK_25M */
if (!is_mx6dqp()) {
phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7);
phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016);
phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007);
val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe);
val &= 0xffe3;
val |= 0x18;
phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val);
}
/* set the IO voltage to 1.8v */
phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f);
phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8);
/* introduce tx clock delay */
phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5);
val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e);
val |= 0x0100;
phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val);
return 0;
}
int board_phy_config(struct phy_device *phydev)
{
ar8031_phy_fixup(phydev);
if (phydev->drv->config)
phydev->drv->config(phydev);
return 0;
}
static void setup_fec(void)
{
if (is_mx6dqp()) {
int ret;
/* select ENET MAC0 TX clock from PLL */
imx_iomux_set_gpr_register(5, 9, 1, 1);
ret = enable_fec_anatop_clock(0, ENET_125MHZ);
if (ret)
printf("Error fec anatop clock settings!\n");
}
/* do nothing */
}
#ifdef CONFIG_USB_EHCI_MX6
......
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