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Commit 3e054dbf authored by Oleksii Kutuzov's avatar Oleksii Kutuzov
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[IMX8MM][MYON2] Remove legacy fuse reader

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board/seco/common/Kconfig
+ 0
− 6
View file @ 3e054dbf
...@@ -75,9 +75,3 @@ config SECO_EEPROM_MANAGER ...@@ -75,9 +75,3 @@ config SECO_EEPROM_MANAGER
This option enables the compilation of the seco-eeprom-manager This option enables the compilation of the seco-eeprom-manager
for Eeprom reading procedure for Eeprom reading procedure
config SECO_READ_CONFIGURATION_FROM_FUSE
default n
bool "SECO read configuration from fuses"
help
This option enables helper code to get board configuration based on
values in fuses.
board/seco/common/Makefile
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− 2
View file @ 3e054dbf
...@@ -100,5 +100,3 @@ obj-$(CONFIG_POWER_PFUZE100) += pfuze.o ...@@ -100,5 +100,3 @@ obj-$(CONFIG_POWER_PFUZE100) += pfuze.o
obj-$(CONFIG_SPLASH_SOURCE) += splash_source.o obj-$(CONFIG_SPLASH_SOURCE) += splash_source.o
obj-$(CONFIG_SECO_EEPROM_MANAGER) += seco_eeprom_manager.o obj-$(CONFIG_SECO_EEPROM_MANAGER) += seco_eeprom_manager.o
obj-$(CONFIG_SECO_READ_CONFIGURATION_FROM_FUSE) += seco_fuse.o
board/seco/common/seco_fuse.c deleted 100644 → 0
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− 442
View file @ 8d14fa5c
/*
* Copyright 2025 SECO
*/
#include <asm/arch/sys_proto.h>
#include <asm/arch/imx-regs.h>
#include "seco_fuse.h"
// clang-format off
#define FUSE14_MODULE(x) ((x & 0xF0000000) >> 28)
#define FUSE14_MODULE_TRIZEPS 0x1
#define FUSE14_MODULE_MYON 0x2
#define FUSE14_MODULE_SBCSOM 0x4
#define FUSE14_MODULE_TRIZEPSr 0x5 // Fix if accidently burned to be Myon or SBCSOM
#define FUSE14_MODULE_MYONr 0x6 // Fix if accidently burned to be Trizeps or SBCSOM
#define FUSE14_MODULE_SBCSOMr 0x7 // Fix if accidently burned to be Myon or Trizeps
#define FUSE14_USE_OTHER_FUSE 0xF // Fuse Invalid, Use other Fuse.
#define FUSE14_RAM(x) ((x & 0x0F000000) >> 24)
#define FUSE14_RAM_UNDEF 0x0
#define FUSE14_RAM_1GB 0x1
#define FUSE14_RAM_2GB 0x2 // Mono-Die
#define FUSE14_RAM_4GB 0x4 // Dual-Die
#define FUSE14_RAM_8GB 0x8 // Dual-Die
#define FUSE14_RAM_2GB_DUALDIE 0xA // reserve/not use for now: 2GB Dual-Die; Engineering Samples without burned fuse used it.
#define FUSE14_RAM_512MB 0xE
#define FUSE14_RAM_AUTODETECT 0xF
#define FUSE14_PCBREV(x) ((x & 0x00F00000) >> 20)
#define FUSE14_TEMP(x) ((x & 0x000C0000) >> 18)
#define FUSE14_TEMP_UNDEF 0x0
#define FUSE14_TEMP_COMMERCIAL 0x1
#define FUSE14_TEMP_EXTENDED 0x2
#define FUSE14_TEMP_INDUSTRIAL 0x3
#define FUSE14_EXTRA(x) ((x & 0x00030000) >> 16)
#define FUSE14_EXTRA_UNDEF 0x0
#define FUSE14_EXTRA_1V8 0x1
#define FUSE14_EXTRA_3V3 0x2
#define FUSE14_EXTRA_CUSTOM 0x3
// clang-format on
int seco_fuse_GetOTP(int key, int defaultval)
{
int ret = defaultval;
/*
|....| Module (0xF.......=next , 0x1.......=Trizeps,0x2.......=Myon)
| |....| RAM (0x.F......)
| | |....| PCB-Rev (0x..F.....)
| | | |.. | Temp (0x...0....=undef, 0x...4....= Con , 0x...8....= Ext , 0x...C....= Industrial)
| | | | ..| Extra (0x...0....=undef, 0x...1....= 1V8 , 0x...2....= 3V3 , 0x...3....= Custom)
i.e.
Trizeps VIII Mini V1R1 with 2GB RAM: fuse prog 14 0 0x1A000000
Trizeps VIII Mini V1R2 with 2GB RAM (Dual-Die K4F6E304HB): fuse prog 14 0 0x1A100000 // Engineering sample, typ. no fuse set
Trizeps VIII Mini V1R1 with 1GB RAM (K4F8E304HB,K4F8E3S4HB):fuse prog 14 0 0x11100000 // Dual&Mono-Die both use 1 chip-select.
Trizeps VIII Mini V1R2 with 2GB RAM (Mono-Die K4F6E3S4HM): fuse prog 14 0 0x12100000
Trizeps VIII Mini V1R2 with 4GB RAM (Dual-Die K4FBE3D4HM): fuse prog 14 0 0x14100000
Myon II V1R1 with 1GB RAM (K4F8E304HB,K4F8E3S4HB): fuse prog 14 0 0x21000000
Myon II V1R1 with 2GB RAM (Dual-Die K4F6E304HB): fuse prog 14 0 0x2A000000 // Engineering sample, typ. no fuse set
Myon II V1R1 with 2GB RAM (Mono-Die K4F6E3S4HM): fuse prog 14 0 0x22000000
Myon II V1R1 with 4GB RAM (Dual-Die K4FBE3D4HM): fuse prog 14 0 0x24000000
SBCSOM V1R1 with 1GB RAM (K4F8E304HB,K4F8E3S4HB): fuse prog 14 0 0x41000000
SBCSOM V1R1 with 2GB RAM (Mono-Die K4F6E3S4HM): fuse prog 14 0 0x42000000
SBCSOM V1R1 with 4GB RAM (Dual-Die K4FBE3D4HM): fuse prog 14 0 0x44000000
// For now do not fuse other options:
.. LVDS
.. Ethernet
.. WLAN
.. Audio
.. MCU
.... FPGA
*/
struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
struct fuse_bank *bank1 = &ocotp->bank[1];
struct fuse_bank1_regs *fuse1 = (struct fuse_bank1_regs *)bank1->fuse_regs;
struct fuse_bank *bank14 = &ocotp->bank[14]; // GP10
u32 fuse14;
bool fuse14valid;
fuse14 = bank14->fuse_regs[0];
if (FUSE14_MODULE(fuse14) == FUSE14_USE_OTHER_FUSE)
fuse14 = bank14->fuse_regs[4];
switch (FUSE14_MODULE(fuse14)) {
case FUSE14_MODULE_TRIZEPS:
case FUSE14_MODULE_TRIZEPSr:
case FUSE14_MODULE_MYON:
case FUSE14_MODULE_MYONr:
case FUSE14_MODULE_SBCSOM:
case FUSE14_MODULE_SBCSOMr:
fuse14valid = true;
break;
default:
fuse14valid = false;
break;
}
if (key == SECO_FUSE_OTP_BOOTSTORAGE) {
switch (fuse1->cfg0 & 0x7000) {
case 0x1000: // SD-Card Boot
ret = SECO_FUSE_BOOTSTORAGE_SDCARD;
break;
case 0x2000: // eMMC Boot
ret = SECO_FUSE_BOOTSTORAGE_EMMCxGB;
if ((defaultval > SECO_FUSE_BOOTSTORAGE_EMMCxGB) &&
(defaultval <=
SECO_FUSE_BOOTSTORAGE_EMMC32GB)) { // Use assumption-value --- do not attempt to figure out size here!
ret = defaultval;
}
break;
default:
break;
}
}
if (key == SECO_FUSE_OTP_MODULE) {
// Fuse only if Myon or Trizeps
// Which Myon/Trizeps is determined by processor
if (fuse14valid) {
if ((FUSE14_MODULE(fuse14) == FUSE14_MODULE_TRIZEPS) ||
(FUSE14_MODULE(fuse14) == FUSE14_MODULE_TRIZEPSr)) { // Trizeps
if (is_imx8mq()) {
ret = SECO_FUSE_MODULE_TRIZEPS8;
} else if (is_imx8mm()) {
ret = SECO_FUSE_MODULE_TRIZEPS8MINI;
} else if (is_imx8mp()) {
ret = SECO_FUSE_MODULE_TRIZEPS8PLUS;
} else { // if ( isimx8mn()) // as soon as this function is available
ret = SECO_FUSE_MODULE_TRIZEPS8NANO;
}
} else if ((FUSE14_MODULE(fuse14) == FUSE14_MODULE_SBCSOM) ||
(FUSE14_MODULE(fuse14) == FUSE14_MODULE_SBCSOMr)) { // SBCSOM
if (is_imx8mm()) {
ret = SECO_FUSE_MODULE_SBCSOM8MINI;
} else { // if ( isimx8mn()) // as soon as this function is available
ret = SECO_FUSE_MODULE_SBCSOM8NANO;
}
} else { // Myon
if (is_imx8mm()) {
ret = SECO_FUSE_MODULE_MYON2;
} else { // if ( isimx8mn()) // as soon as this function is available
ret = SECO_FUSE_MODULE_MYON2NANO;
}
}
}
}
if (key == SECO_FUSE_OTP_RAMWIDTH) {
// For now, not fused in OTP
}
if (key == SECO_FUSE_OTP_RAMSIZE) { // Select between 512MB, 1G, 2G, 3G, 4G and 8G
if (fuse14valid) {
switch (FUSE14_RAM(fuse14)) {
case FUSE14_RAM_512MB:
ret = SECO_FUSE_RAMSIZE_512MB;
break;
case FUSE14_RAM_1GB:
ret = SECO_FUSE_RAMSIZE_1GB;
break;
case FUSE14_RAM_2GB:
case FUSE14_RAM_2GB_DUALDIE:
ret = SECO_FUSE_RAMSIZE_2GB;
break;
case FUSE14_RAM_4GB:
ret = SECO_FUSE_RAMSIZE_4GB;
break;
case FUSE14_RAM_8GB:
ret = SECO_FUSE_RAMSIZE_8GB;
break;
case FUSE14_RAM_AUTODETECT:
ret = SECO_FUSE_RAMSIZE_AUTODETECT;
break;
default:
break;
}
}
}
if (key == SECO_FUSE_OTP_RAMSKEW) {
if (fuse14valid) {
switch (FUSE14_RAM(fuse14)) {
case FUSE14_RAM_2GB:
ret = 1;
break;
case FUSE14_RAM_2GB_DUALDIE:
ret = 0;
break;
default:
break;
}
}
}
if (key == SECO_FUSE_OTP_PCBREV) { // V1R1 .. VnRn
if (fuse14valid) {
ret = FUSE14_PCBREV(fuse14);
}
}
if (key == SECO_FUSE_OTP_TEMPERATURERANGE) {
// Range: Consumer, Extended and Industrial
// Usually not fused(?). Only needed for Industrial
if (fuse14valid) {
switch (FUSE14_TEMP(fuse14)) {
case FUSE14_TEMP_COMMERCIAL:
ret = SECO_FUSE_TEMP_COMMERCIAL_0_70;
break;
case FUSE14_TEMP_EXTENDED:
ret = SECO_FUSE_TEMP_EXTENDED_m25_85;
break;
case FUSE14_TEMP_INDUSTRIAL:
ret = SECO_FUSE_TEMP_INDUSTRIAL_m40_85;
break;
default:
break;
}
}
}
if (key == SECO_FUSE_OTP_IOVOLTAGE) {
if (fuse14valid) {
if ((FUSE14_MODULE(fuse14) == FUSE14_MODULE_TRIZEPS) ||
(FUSE14_MODULE(fuse14) == FUSE14_MODULE_TRIZEPSr)) { // Trizeps
// Fuse currently has no function
} else { // Myon or SBCSOM
switch (FUSE14_EXTRA(fuse14)) {
case FUSE14_EXTRA_3V3:
ret = SECO_FUSE_IOVOLTAGE_3V3;
break;
case FUSE14_EXTRA_CUSTOM:
ret = SECO_FUSE_IOVOLTAGE_CUSTOM;
break;
case FUSE14_EXTRA_1V8:
default:
ret = SECO_FUSE_IOVOLTAGE_1V8;
break;
}
}
}
}
if (key == SECO_FUSE_OTP_ETHERNET) { // Fuse or Autodetect (mdio)? 1
if ((FUSE14_MODULE(fuse14) == FUSE14_MODULE_TRIZEPS) ||
(FUSE14_MODULE(fuse14) == FUSE14_MODULE_TRIZEPSr)) {
if (is_imx8mm()) {
if (FUSE14_PCBREV(fuse14) >= 3)
ret = SECO_FUSE_ETHERNET_RTL8211;
} else if (is_imx8mp()) {
if (FUSE14_PCBREV(fuse14) >= 2)
ret = SECO_FUSE_ETHERNET_RTL8211;
}
}
}
if (key == SECO_FUSE_OTP_WIRELESS) { // Fuse or Autodetect (pcie)? 3
}
if (key == SECO_FUSE_OTP_AUDIO) { // Fuse or Autodetect (i2c)? 1/2
}
if (key == SECO_FUSE_OTP_MCU) { // Fuse or Autodetect (i2c)? 2
}
if (key == SECO_FUSE_OTP_LVDS) { // Fuse or Autodetect (i2c)? 2
}
if (key == SECO_FUSE_OTP_FPGA) { // Fuse or Autodetect (i2c)? 6
}
return ret;
}
int seco_fuse_GetModule(void)
{
int module = ASSUME__SECO_FUSE_MODULE_TYPE;
if (is_imx8mq()) {
module = SECO_FUSE_MODULE_TRIZEPS8;
}
module = seco_fuse_GetOTP(SECO_FUSE_OTP_MODULE, module);
#ifdef FORCE__SECO_FUSE_MODULE_TYPE
module = FORCE__SECO_FUSE_MODULE_TYPE;
#endif
return module;
}
int seco_fuse_GetRAMSize(void)
{
int size = ASSUME__SECO_FUSE_RAMSIZE;
size = seco_fuse_GetOTP(SECO_FUSE_OTP_RAMSIZE, size);
#ifdef FORCE__SECO_FUSE_RAMSIZE
size = FORCE__SECO_FUSE_RAMSIZE;
#endif
return size;
}
int seco_fuse_GetRAMSkew(void)
{
int skew = ASSUME__SECO_FUSE_RAMSKEW;
skew = seco_fuse_GetOTP(SECO_FUSE_OTP_RAMSKEW, skew);
#ifdef FORCE__SECO_FUSE_RAMSKEW
skew = FORCE__SECO_FUSE_RAMSKEW;
#endif
return skew;
}
int seco_fuse_GetPCBrevision(void)
{
int rev = ASSUME__SECO_FUSE_PCBREV;
rev = seco_fuse_GetOTP(SECO_FUSE_OTP_PCBREV, rev);
#ifdef FORCE__SECO_FUSE_PCBREV
rev = FORCE__SECO_FUSE_PCBREV;
#endif
return rev;
}
int seco_fuse_GetPeripheral(int peripheral)
{
int ret = SECO_FUSE_PERIPHERAL_UNKNOWN;
int module = seco_fuse_GetModule();
switch (peripheral) {
case SECO_FUSE_PERIPHERAL_ETHERNET:
ret = seco_fuse_GetOTP(SECO_FUSE_OTP_ETHERNET, ASSUME__PERIPHERAL_ETHERNET);
break;
case SECO_FUSE_PERIPHERAL_WIRELESS:
ret = seco_fuse_GetOTP(SECO_FUSE_OTP_WIRELESS, ASSUME__PERIPHERAL_WIRELESS);
break;
case SECO_FUSE_PERIPHERAL_AUDIO:
ret = seco_fuse_GetOTP(SECO_FUSE_OTP_AUDIO, ASSUME__PERIPHERAL_AUDIO);
break;
case SECO_FUSE_PERIPHERAL_MCU:
ret = seco_fuse_GetOTP(SECO_FUSE_OTP_MCU, ASSUME__PERIPHERAL_MCU);
break;
case SECO_FUSE_PERIPHERAL_LVDS:
ret = seco_fuse_GetOTP(SECO_FUSE_OTP_LVDS, ASSUME__PERIPHERAL_LVDS);
break;
case SECO_FUSE_PERIPHERAL_FPGA:
ret = seco_fuse_GetOTP(SECO_FUSE_OTP_FPGA, ASSUME__PERIPHERAL_FPGA);
break;
case SECO_FUSE_PERIPHERAL_IOVOLTAGE:
ret = seco_fuse_GetOTP(SECO_FUSE_OTP_IOVOLTAGE, ASSUME__PERIPHERAL_IOVOLTAGE);
break;
default:
break;
}
if ((module == SECO_FUSE_MODULE_MYON2) || (module == SECO_FUSE_MODULE_MYON2NANO)) {
switch (peripheral) {
case SECO_FUSE_PERIPHERAL_ETHERNET:
ret = SECO_FUSE_ETHERNET_NONE;
break;
case SECO_FUSE_PERIPHERAL_WIRELESS:
ret = SECO_FUSE_WIRELESS_NONE;
break;
case SECO_FUSE_PERIPHERAL_MCU:
ret = SECO_FUSE_MCU_NONE;
break;
case SECO_FUSE_PERIPHERAL_FPGA:
ret = SECO_FUSE_FPGA_NONE;
break;
default:
break;
}
} else {
switch (peripheral) {
case SECO_FUSE_PERIPHERAL_IOVOLTAGE:
ret = SECO_FUSE_IOVOLTAGE_3V3;
break;
default:
break;
}
}
switch (peripheral) {
#ifdef FORCE__PERIPHERAL_ETHERNET
case SECO_FUSE_PERIPHERAL_ETHERNET:
ret = FORCE__PERIPHERAL_ETHERNET;
break;
#endif
#ifdef FORCE__PERIPHERAL_WIRLESS
case SECO_FUSE_PERIPHERAL_WIRELESS:
ret = FORCE__PERIPHERAL_WIRELESS;
break;
#endif
#ifdef FORCE__PERIPHERAL_AUDIO
case SECO_FUSE_PERIPHERAL_AUDIO:
ret = FORCE__PERIPHERAL_AUDIO;
break;
#endif
#ifdef FORCE__PERIPHERAL_MCU
case SECO_FUSE_PERIPHERAL_MCU:
ret = FORCE__PERIPHERAL_MCU;
break;
#endif
#ifdef FORCE__PERIPHERAL_LVDS
case SECO_FUSE_PERIPHERAL_LVDS:
ret = FORCE__PERIPHERAL_LVDS;
break;
#endif
#ifdef FORCE__PERIPHERAL_FPGA
case SECO_FUSE_PERIPHERAL_FPGA:
ret = FORCE__PERIPHERAL_FPGA;
break;
#endif
#ifdef FORCE__PERIPHERAL_IOVOLTAGE
case SECO_FUSE_PERIPHERAL_IOVOLTAGE:
ret = FORCE__PERIPHERAL_IOVOLTAGE;
break;
#endif
default:
break;
}
return ret;
}
char *TR8M_REVSTR[] = { "V1R1", "V1R2", "V1R3", "V2R1", "V2R2", "V3R1", "V3R2", "V3R3", "V4R1" };
char *TR8P_REVSTR[] = { "V1R1", "V1R2", "V1R3", "V1R4" };
char *MYON2_REVSTR[] = { "V1R1", "V1R2", "V1R3", "V1R4", "V2R1" };
char *GEN_REVSTR[] = { "V1R1", "V1R2", "V1R3", "V1R4", "V2R2", "V3R1", "V3R2", "V3R3", "V4R1" };
char *revstr(unsigned int module, unsigned int rev)
{
if ((module == SECO_FUSE_MODULE_TRIZEPS8MINI) || (module == SECO_FUSE_MODULE_TRIZEPS8MINI))
return rev < ARRAY_SIZE(TR8M_REVSTR) ? TR8M_REVSTR[rev] : "????";
else if (module == SECO_FUSE_MODULE_TRIZEPS8PLUS)
return rev < ARRAY_SIZE(TR8P_REVSTR) ? TR8P_REVSTR[rev] : "????";
else if (module == SECO_FUSE_MODULE_MYON2)
return rev < ARRAY_SIZE(MYON2_REVSTR) ? MYON2_REVSTR[rev] : "????";
else
return rev < ARRAY_SIZE(GEN_REVSTR) ? GEN_REVSTR[rev] : "????";
}
board/seco/common/seco_fuse.h deleted 100644 → 0
+ 0
− 175
View file @ 8d14fa5c
/*
* Copyright 2025 SECO
*/
#ifndef __SECO_FUSE_BOARDS_H__
#define __SECO_FUSE_BOARDS_H__
// clang-format off
#define ASSUME__SECO_FUSE_MODULE_TYPE SECO_FUSE_MODULE_UNKNOWN
#define ASSUME__SECO_FUSE_RAMWIDTH SECO_FUSE_RAMWIDTH_32BIT
#define ASSUME__SECO_FUSE_RAMSIZE SECO_FUSE_RAMSIZE_1GB
#define ASSUME__SECO_FUSE_RAMSKEW 1
#define ASSUME__SECO_FUSE_PCBREV SECO_FUSE_PCBREV_UNKNOWN
#define ASSUME__SECO_FUSE_TEMPERATURERANGE SECO_FUSE_TEMPERATURERANGE_UNKNOWN
#define ASSUME__SECO_FUSE_BOOTSTORAGE SECO_FUSE_BOOTSTORAGE_UNKNOWN
#define ASSUME__PERIPHERAL_ETHERNET SECO_FUSE_ETHERNET_UNKNOWN
#define ASSUME__PERIPHERAL_WIRELESS SECO_FUSE_WIRELESS_UNKNOWN
#define ASSUME__PERIPHERAL_AUDIO SECO_FUSE_AUDIO_UNKNOWN
#define ASSUME__PERIPHERAL_MCU SECO_FUSE_MCU_UNKNOWN
#define ASSUME__PERIPHERAL_LVDS SECO_FUSE_LVDS_UNKNOWN
#define ASSUME__PERIPHERAL_FPGA SECO_FUSE_FPGA_UNKNOWN
#define ASSUME__PERIPHERAL_IOVOLTAGE SECO_FUSE_IOVOLTAGE_UNKNOWN
// clang-format on
enum SECO_FUSE_OTP {
SECO_FUSE_OTP_MODULE,
SECO_FUSE_OTP_RAMWIDTH,
SECO_FUSE_OTP_RAMSIZE,
SECO_FUSE_OTP_RAMSKEW,
SECO_FUSE_OTP_PCBREV,
SECO_FUSE_OTP_TEMPERATURERANGE,
SECO_FUSE_OTP_BOOTSTORAGE,
SECO_FUSE_OTP_ETHERNET,
SECO_FUSE_OTP_WIRELESS,
SECO_FUSE_OTP_AUDIO,
SECO_FUSE_OTP_MCU,
SECO_FUSE_OTP_LVDS,
SECO_FUSE_OTP_FPGA,
SECO_FUSE_OTP_IOVOLTAGE
};
int seco_fuse_GetOTP(int key, int defaultval);
enum SECO_FUSE_MODULE_TYPE {
SECO_FUSE_MODULE_UNKNOWN = 0,
SECO_FUSE_MODULE_TRIZEPS8,
SECO_FUSE_MODULE_TRIZEPS8MINI,
SECO_FUSE_MODULE_TRIZEPS8NANO,
SECO_FUSE_MODULE_TRIZEPS8PLUS,
SECO_FUSE_MODULE_MYON2,
SECO_FUSE_MODULE_MYON2NANO,
SECO_FUSE_MODULE_SBCSOM8MINI,
SECO_FUSE_MODULE_SBCSOM8NANO,
GUF_MODULE_TANARO,
GUF_MODULE_MC3,
SECO_MODULE_D18,
};
int seco_fuse_GetModule(void);
enum SECO_FUSE_RAMWIDTH {
SECO_FUSE_RAMWIDTH_UNKNOWN = -1,
SECO_FUSE_RAMWIDTH_8BIT = 8,
SECO_FUSE_RAMWIDTH_16BIT = 16,
SECO_FUSE_RAMWIDTH_32BIT = 32,
SECO_FUSE_RAMWIDTH_64BIT = 64
};
enum SECO_FUSE_RAMSIZE {
SECO_FUSE_RAMSIZE_UNKNOWN = -1,
SECO_FUSE_RAMSIZE_512MB = 0,
SECO_FUSE_RAMSIZE_1GB = 1,
SECO_FUSE_RAMSIZE_2GB = 2,
SECO_FUSE_RAMSIZE_3GB = 3,
SECO_FUSE_RAMSIZE_4GB = 4,
SECO_FUSE_RAMSIZE_6GB = 6,
SECO_FUSE_RAMSIZE_8GB = 8,
SECO_FUSE_RAMSIZE_AUTODETECT
};
int seco_fuse_GetRAMSize(void);
int seco_fuse_GetRAMSkew(void);
enum SECO_FUSE_PCBREV {
SECO_FUSE_PCBREV_UNKNOWN = -1,
SECO_FUSE_PCBREV_V1R1 = 0,
SECO_FUSE_PCBREV_V1R2 = 1,
SECO_FUSE_PCBREV_V1R3 = 2,
SECO_FUSE_PCBREV_V2R1 = 3,
SECO_FUSE_PCBREV_V2R2 = 4,
SECO_FUSE_PCBREV_V3R1 = 5,
SECO_FUSE_PCBREV_V3R2 = 6,
SECO_FUSE_PCBREV_V3R3 = 7,
};
int seco_fuse_GetPCBrevision(void);
enum SECO_FUSE_TEMPERATURERANGE {
SECO_FUSE_TEMPERATURERANGE_UNKNOWN = -1,
SECO_FUSE_TEMP_COMMERCIAL_0_70,
SECO_FUSE_TEMP_EXTENDED_m25_85,
SECO_FUSE_TEMP_INDUSTRIAL_m40_85
};
#define SECO_FUSE_PERIPHERAL_UNKNOWN 1
enum SECO_FUSE_PERIPHERAL {
SECO_FUSE_PERIPHERAL_ETHERNET,
SECO_FUSE_PERIPHERAL_WIRELESS,
SECO_FUSE_PERIPHERAL_AUDIO,
SECO_FUSE_PERIPHERAL_MCU,
SECO_FUSE_PERIPHERAL_LVDS,
SECO_FUSE_PERIPHERAL_FPGA,
SECO_FUSE_PERIPHERAL_IOVOLTAGE
};
enum SECO_FUSE_ETHERNET {
SECO_FUSE_ETHERNET_NONE = 0,
SECO_FUSE_ETHERNET_UNKNOWN = SECO_FUSE_PERIPHERAL_UNKNOWN,
SECO_FUSE_ETHERNET_AR8031,
SECO_FUSE_ETHERNET_RTL8211,
};
enum SECO_FUSE_WIRELESS {
SECO_FUSE_WIRELESS_NONE = 0,
SECO_FUSE_WIRELESS_UNKNOWN = SECO_FUSE_PERIPHERAL_UNKNOWN,
SECO_FUSE_WIRELESS_LAIRD_SU60,
SECO_FUSE_WIRELESS_LAIRD_ST60,
SECO_FUSE_WIRELESS_HD_SPB228,
SECO_FUSE_WIRELESS_SILEX_SXPCEAC2
};
enum SECO_FUSE_AUDIO {
SECO_FUSE_AUDIO_NONE = 0,
SECO_FUSE_AUDIO_UNKNOWN = SECO_FUSE_PERIPHERAL_UNKNOWN,
SECO_FUSE_AUDIO_WM8983,
SECO_FUSE_AUDIO_WM8978,
SECO_FUSE_AUDIO_TAS2552,
};
enum SECO_FUSE_MCU {
SECO_FUSE_MCU_NONE = 0,
SECO_FUSE_MCU_UNKNOWN = SECO_FUSE_PERIPHERAL_UNKNOWN,
SECO_FUSE_MCU_MKV10Z32VFM7,
SECO_FUSE_MCU_MKV11Z64VFM7
};
enum SECO_FUSE_LVDS {
SECO_FUSE_LVDS_NONE = 0,
SECO_FUSE_LVDS_UNKNOWN = SECO_FUSE_PERIPHERAL_UNKNOWN,
SECO_FUSE_LVDS_SN65DSI83, // single
SECO_FUSE_LVDS_SN65DSI85 // dual
};
enum SECO_FUSE_FPGA {
SECO_FUSE_FPGA_NONE = 0,
SECO_FUSE_FPGA_UNKNOWN = SECO_FUSE_PERIPHERAL_UNKNOWN,
SECO_FUSE_FPGA_LCMXO3LF_1300E,
SECO_FUSE_FPGA_LCMXO3LF_2100E,
SECO_FUSE_FPGA_LCMXO3LF_4300E,
SECO_FUSE_FPGA_LCMXO3L_1300E,
SECO_FUSE_FPGA_LCMXO3L_2100E,
SECO_FUSE_FPGA_LCMXO3L_4300E
};
enum SECO_FUSE_IOVOLTAGE {
SECO_FUSE_IOVOLTAGE_UNKNOWN = SECO_FUSE_PERIPHERAL_UNKNOWN,
SECO_FUSE_IOVOLTAGE_1V8,
SECO_FUSE_IOVOLTAGE_3V3,
SECO_FUSE_IOVOLTAGE_CUSTOM
};
int seco_fuse_GetPeripheral(int peripheral);
enum SECO_FUSE_BOOTSTORAGE {
SECO_FUSE_BOOTSTORAGE_UNKNOWN = 0,
SECO_FUSE_BOOTSTORAGE_SDCARD,
SECO_FUSE_BOOTSTORAGE_EMMCxGB,
SECO_FUSE_BOOTSTORAGE_EMMC4GB,
SECO_FUSE_BOOTSTORAGE_EMMC8GB,
SECO_FUSE_BOOTSTORAGE_EMMC16GB,
SECO_FUSE_BOOTSTORAGE_EMMC32GB
};
char *revstr(unsigned int module, unsigned int rev);
#endif /* __SECO_FUSE_BOARDS_H__ */
board/seco/imx8mm_myon2/imx8mm_myon2.c
+ 0
− 1
View file @ 3e054dbf
...@@ -19,7 +19,6 @@ ...@@ -19,7 +19,6 @@
#include <power/bd71837.h> #include <power/bd71837.h>
#include <usb.h> #include <usb.h>
#include "../common/seco_fuse.h"
#ifdef CONFIG_SECO_ENV_MANAGER #ifdef CONFIG_SECO_ENV_MANAGER
#include <seco/env_common.h> #include <seco/env_common.h>
......
board/seco/imx8mm_myon2/spl.c
+ 0
− 2
View file @ 3e054dbf
...@@ -24,8 +24,6 @@ ...@@ -24,8 +24,6 @@
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
#include "../common/seco_fuse.h"
extern void ssc_state_video_pll(bool enable, u32 ssc_reg); extern void ssc_state_video_pll(bool enable, u32 ssc_reg);
extern struct dram_timing_info dram_timing_v1r1; extern struct dram_timing_info dram_timing_v1r1;
......
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