Integrate gitlab-ci/probe_test and 6 more

Commit: https://git.seco.com/edgehog/infrastructure/gitlab-ci/-/commit/abd19aaac279c92e61fba72b65fdc2ea7caff5de

Merge branch 'probe_test' of git.seco.com:edgehog/infrastructure/gitlab-ci into probe_test

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Commit: https://git.seco.com/edgehog/infrastructure/gitlab-ci/-/commit/cbf55108728afc98400cd18135a956098f9076bc

[CHANGELOG] Remove linux-imx repository reference

• The Edgehog project is not using anymore the forked repository but the original one in GitHub

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Commit: https://git.seco.com/edgehog/infrastructure/gitlab-ci/-/commit/b3de77f23c31a400a4d4b4b96e7b96901e53e588

[A62] Update CI_PARAM_TEST_SUITE value

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Commit: https://git.seco.com/edgehog/infrastructure/gitlab-ci/-/commit/ce8d8d8dc14b68f45099663680cd0baee572ac4c

[TEST] Add CI_PARAM_TEST_SUITE

• Parameter necessary to submit test job

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Commit: https://git.seco.com/edgehog/infrastructure/gitlab-ci/-/commit/4aa451241f39cf2d911640f08130a79df46d4655

[TESTING] Add test-probe stage

• First implementation of LAVA testing of Edgehog Embedded Full Image
• First support for A62, C20, C26, C43, C12
• The test is executed every time a new build is executed by triggering it manually or on schedule (allow to fail rule)
• Change rule for deploy, changelog to manually run on MR

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Commit: https://git.seco.com/edgehog/infrastructure/gitlab-ci/-/commit/eec919bff8c6ea5f5d72d23543233623defac20b

[CACHE] Avoid sstate-cache usage for Intel

• An error in compiling .wic image is given when building Intel Apollo Lake image

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Commit: https://git.seco.com/edgehog/infrastructure/gitlab-ci/-/commit/bb022e9c0264a173cd29ab9d3b60e43e7043491a

[BUILD] Remove error on dtbo artifacts not found

• This is necessary since seco-ne boards does not have .dtbo but only .dtb