- Mar 07, 2015
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Matt Porter authored
A clock specifier is required for i.MX I2C and is provided in all DTS implementations. Add this to the list of required properties in the binding. Signed-off-by:
Matt Porter <mporter@konsulko.com> Signed-off-by:
Wolfram Sang <wsa@the-dreams.de>
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- Feb 20, 2015
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David Daney authored
- Use of_irq_init() to initialize interrupt controllers - Get rid of some unlikely() - Add CIB to support SATA and other interrupts - Add support for CIU SUM2 interrupt sources Signed-off-by:
David Daney <david.daney@cavium.com> Signed-off-by:
Leonid Rosenboim <lrosenboim@caviumnetworks.com> Signed-off-by:
Aleksey Makarov <aleksey.makarov@auriga.com> Signed-off-by:
Peter Swain <peter.swain@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8947/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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- Feb 17, 2015
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Zubair Lutfullah Kakakhel authored
Add binding for jz4740 watchdog timer. It is a simple watchdog timer. Signed-off-by:
Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Reviewed-by:
Guenter Roeck <linux@roeck-us.net> Signed-off-by:
Wim Van Sebroeck <wim@iguana.be>
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Mike Looijmans authored
On some chips, like the TPS386000, the trigger cannot be disabled and the CPU must keep toggling the line at all times. Add a switch "always_running" to keep toggling the GPIO line regardless of the state of the soft part of the watchdog. The "armed" member keeps track of whether a timeout must also cause a reset. Signed-off-by:
Mike Looijmans <mike.looijmans@topic.nl> Reviewed-by:
Guenter Roeck <linux@roeck-us.net> Signed-off-by:
Wim Van Sebroeck <wim@iguana.be>
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Matthias Brugger authored
Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by:
Guenter Roeck <linux@roeck-us.net> Signed-off-by:
Wim Van Sebroeck <wim@iguana.be>
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Naidu Tellapati authored
Add the devicetree binding document for ImgTec PDC Watchdog Timer. Reviewed-by:
Andrew Bresticker <abrestic@chromium.org> Signed-off-by:
Naidu Tellapati <Naidu.Tellapati@imgtec.com> Signed-off-by:
Jude Abraham <Jude.Abraham@gmail.com> Signed-off-by:
Ezequiel Garcia <ezequiel.garcia@imgtec.com> Reviewed-by:
Guenter Roeck <linux@roeck-us.net> Signed-off-by:
Wim Van Sebroeck <wim@iguana.be>
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Ray Jui authored
Add initial support to the Broadcom iProc I2C controller found in the iProc family of SoCs. The iProc I2C controller has separate internal TX and RX FIFOs, each has a size of 64 bytes. The iProc I2C controller supports two bus speeds including standard mode (100kHz) and fast mode (400kHz) Signed-off-by:
Ray Jui <rjui@broadcom.com> Reviewed-by:
Scott Branden <sbranden@broadcom.com> Reviewed-by:
Kevin Cernekee <cernekee@chromium.org> Signed-off-by:
Wolfram Sang <wsa@the-dreams.de>
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- Feb 14, 2015
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Gregory CLEMENT authored
The Marvell Armada 38x SoCs contains an RTC which differs from the RTC used in the other mvebu SoCs until now. This forth version of the patch set adds support for this new IP and enable it in the Device Tree of the Armada 38x SoC. This patch (of 5): The Armada 38x SoCs come with a new RTC which differs from the one used in the other mvebu SoCs until now. This patch describes the binding of this RTC. Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Arnaud Ebalard <arno@natisbad.org> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Boris BREZILLON <boris.brezillon@free-electrons.com> Cc: Lior Amsalem <alior@marvell.com> Cc: Tawfik Bayouk <tawfik@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Mark Rutland <mark.rutland@arm.com> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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Arnaud Ebalard authored
This patch adds support for Abracon AB-RTCMC-32.768kHz-B5ZE-S3 RTC/Calendar module w/ I2C interface. This support includes RTC time reading and setting, Alarm (1 minute accuracy) reading and setting, and battery low detection. The device also supports frequency adjustment and two timers but those features are currently not implemented in this driver. Due to alarm accuracy limitation (and current lack of timer support in the driver), UIE mode is not supported. Signed-off-by:
Arnaud Ebalard <arno@natisbad.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Peter Huewe <peter.huewe@infineon.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Thierry Reding <treding@nvidia.com> Cc: Mark Brown <broonie@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robherring2@gmail.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Landley <rob@landley.net> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Guenter Roeck <linux@roeck-us.net> Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Cc: Kumar Gala <galak@codeaurora.org> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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Arnaud Ebalard authored
This series adds support for Abracon AB-RTCMC-32.768kHz-B5ZE-S3 I2C RTC chip. Unlike many RTC chips, it includes an internal oscillator which spares room on the PCB. It also has some interesting features, like battery low detection (which the driver in this series supports). The only small "limitation" (mainly due to what RTC subsystem expects from RTC chips) is the fact that its alarm is accurate to the second. This series provides a solution (described below) for that limitation using another mechanism of the chip. I decided to split support between three different patches for this v0: - Patch 1/3: it simply references Abracon Corporation in vendor-prefixes documentation file. As Abracon has no NASDAQ ticker symbol; I have decided to use "abcn" (I initially started my work w/ "ab" but later changed for "abcn" which looked more meaningful) - Patch 2/3: it adds initial support for the chip and provides the ability to read/write time and also read/write alarm. As the alarm the chip provides is accurate to the minute, the support provided by this patch also has this limitation (e.g. UIE mode is not supported). - Patch 3/3: the chip supports a watchdog timer which can be used to extend the alarm mechanism in patch 2/3 in order to provide support for alarms under one minute (e.g. support UIE mode). In practice, the logic I implemented is to use the watchdog timer for alarms which are at most 4 minutes in the future and use the common alarm mechanism for alarms which are set to larger values. With that additional patch the device fully passes the rtctest.c program. I decided to split the driver between two patches (2 and 3 of 3) in order to ease review: patch 2 should be pretty straightforward to read for someone familiar w/ RTC subsystem. Patch 3 only extends what is in patch 2 regarding alarms. This patch (of 3): Documentation/devicetree/bindings/vendor-prefixes.txt: add vendor prefix for Abracon Corporation Signed-off-by:
Arnaud Ebalard <arno@natisbad.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Peter Huewe <peter.huewe@infineon.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Thierry Reding <treding@nvidia.com> Cc: Mark Brown <broonie@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robherring2@gmail.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Landley <rob@landley.net> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Guenter Roeck <linux@roeck-us.net> Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Cc: Kumar Gala <galak@codeaurora.org> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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Arnaud Ebalard authored
Current in-tree users of ISL12057 RTC chip (NETGEAR ReadyNAS 102, 104 and 2120) do not have the IRQ#2 pin of the chip (associated w/ the Alarm1 mechanism) connected to their SoC, but to a PMIC (TPS65251 FWIW). This specific hardware configuration allows the NAS to wake up when the alarms rings. Recently introduced alarm support for ISL12057 relies on the provision of an "interrupts" property in system .dts file, which previous three users will never get. For that reason, alarm support on those devices is not function. To support this use case, this patch adds a new DT property for ISL12057 (isil,irq2-can-wakeup-machine) to indicate that the chip is capable of waking up the device using its IRQ#2 pin (even though it does not have its IRQ#2 pin connected directly to the SoC). This specific configuration was tested on a ReadyNAS 102 by setting an alarm, powering off the device and see it reboot as expected when the alarm rang w/: # echo `date '+%s' -d '+ 1 minutes'` > /sys/class/rtc/rtc0/wakealarm # shutdown -h now As a side note, the ISL12057 remains in the list of trivial devices, because the property is not per se required by the device to work but can help handle system w/ specific requirements. In exchange, the new feature is described in details in a specific documentation file. Signed-off-by:
Arnaud Ebalard <arno@natisbad.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Peter Huewe <peter.huewe@infineon.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Thierry Reding <treding@nvidia.com> Cc: Mark Brown <broonie@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Darshana Padmadas <darshanapadmadas@gmail.com> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Landley <rob@landley.net> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Guenter Roeck <linux@roeck-us.net> Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Cc: Kumar Gala <galak@codeaurora.org> Cc: Uwe Kleine-König <uwe@kleine-koenig.org> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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Joshua Clayton authored
Add compatible string "nxp,rtc-pcf2123" Document the binding Signed-off-by:
Joshua Clayton <stillcompiling@gmail.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Grant Likely <grant.likely@linaro.org> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- Feb 11, 2015
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Ajay Kumar authored
This patch is based on exynos-drm-next branch of Inki Dae's tree at: git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos.git DECON(Display and Enhancement Controller) is the new IP in exynos7 SOC for generating video signals using pixel data. DECON driver can be used to drive 2 different interfaces on Exynos7: DECON-INT(video controller) and DECON-EXT(Mixer for HDMI) The existing FIMD driver code was used as a template to create DECON driver. Only DECON-INT is supported as of now, and DECON-EXT support will be added later. The current version of the driver supports video mode displays. Changelog v2: - Change config name, DRM_EXYNOS_DECON to DRM_EXYNOS7_DECON. Signed-off-by:
Akshu Agrawal <akshua@gmail.com> Signed-off-by:
Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by:
Inki Dae <inki.dae@samsung.com>
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- Feb 08, 2015
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Zhou Wang authored
This patch adds the related dts binding document for Hisilicon 504 NAND controller. Signed-off-by:
Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by:
Brian Norris <computersforpeace@gmail.com>
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- Feb 07, 2015
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Marek Szyprowski authored
Mixed need to have hdmi clock enabled to properly perform power on/off sequences, so add handling of this clock directly to the mixer driver. Dependency between hdmi clock and mixer module has been observed on Exynos4 based boards. Suggested-by:
Andrzej Hajda <a.hajda@samsung.com> Reviewed-by:
Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by:
Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by:
Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by:
Inki Dae <inki.dae@samsung.com>
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- Feb 06, 2015
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Kenneth Westfield authored
Add documentation to the sound directory of the device-tree bindings for the Maxim MAX98357A audio DAC. Signed-off-by:
Kenneth Westfield <kwestfie@codeaurora.org> Acked-by:
Banajit Goswami <bgoswami@codeaurora.org> Signed-off-by:
Mark Brown <broonie@kernel.org>
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Ley Foon Tan authored
The Altera mailbox allows for interprocessor communication. It supports only one channel and work as either sender or receiver. Signed-off-by:
Ley Foon Tan <lftan@altera.com>
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- Feb 05, 2015
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Max Filippov authored
Allow bus clock specification as a common clock handle. This makes this controller easier to use in a setup based on common clock framework. Signed-off-by:
Max Filippov <jcmvbkbc@gmail.com> Signed-off-by:
Wolfram Sang <wsa@the-dreams.de>
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Max Filippov authored
clock-frequency property is meant to control the bus frequency for i2c bus drivers, but it was incorrectly used to specify i2c controller input clock frequency. Introduce new attribute, opencores,ip-clock-frequency, that specifies i2c controller clock frequency and make clock-frequency attribute compatible with other i2c drivers. Maintain backwards compatibility in case opencores,ip-clock-frequency attribute is missing. Signed-off-by:
Max Filippov <jcmvbkbc@gmail.com> Signed-off-by:
Wolfram Sang <wsa@the-dreams.de>
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Andy Shevchenko authored
Instead of using magic number in the code the patch provides DW_DMA_MAX_NR_MASTERS constant. While here, restrict the reading of data width array by amount of the actual number of AHB masters. Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by:
Vinod Koul <vinod.koul@intel.com>
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Andrew Bresticker authored
Add a binding document for the IMG Multi-threaded DMA Controller (MDC) present on the MIPS-based Pistachio and other IMG SoCs. Signed-off-by:
Andrew Bresticker <abrestic@chromium.org> Acked-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
Vinod Koul <vinod.koul@intel.com>
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- Feb 04, 2015
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Zubair Lutfullah Kakakhel authored
This patch adds binding for the jz4740-i2s driver. Signed-off-by:
Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Acked-by:
Lars-Peter Clausen <lars@metafoo.de> Signed-off-by:
Mark Brown <broonie@kernel.org>
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Kaixu Xia authored
Now we use the device name to identify replicator instead of a unique number, so just remove it. Signed-off-by:
Kaixu Xia <xiakaixu@huawei.com> Signed-off-by:
Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Fabio Estevam authored
OmniVision Technologies is a manufacturer of CMOS Image Sensors. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by:
Rob Herring <robh@kernel.org>
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Fabio Estevam authored
The correct symbol for OmniVision Technologies is 'ovti', so let's convert it. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by:
Rob Herring <robh@kernel.org>
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Liu Ying authored
Signed-off-by:
Liu Ying <Ying.Liu@freescale.com> Signed-off-by:
Rob Herring <robh@kernel.org>
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Liu Ying authored
Signed-off-by:
Liu Ying <Ying.Liu@freescale.com> Signed-off-by:
Rob Herring <robh@kernel.org>
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Pantelis Antoniou authored
Introduce I2C device tree overlay tests. Tests insertion and removal of i2c adapters, i2c devices, and muxes. Signed-off-by:
Pantelis Antoniou <pantelis.antoniou@konsulko.com> Signed-off-by:
Rob Herring <robh@kernel.org>
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Tomi Valkeinen authored
Add device tree binding documentation for DRA7xx display subsystem. Signed-off-by:
Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: devicetree@vger.kernel.org
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Marek Szyprowski authored
This patch provides a simple mmc-pwrseq-emmc driver, which controls single gpio line. It perform standard eMMC hw reset procedure, as descibed by Jedec 4.4 specification. This procedure is performed just after MMC core enabled power to the given mmc host (to fix possible issues if bootloader has left eMMC card in initialized or unknown state), and before performing complete system reboot (also in case of emergency reboot call). The latter is needed on boards, which doesn't have hardware reset logic connected to emmc card and (limited or broken) ROM bootloaders are unable to read second stage from the emmc card if the card is left in unknown or already initialized state. Signed-off-by:
Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Paul Walmsley authored
DT maintainers require all compatible strings used in chip or board DTS file to be previously documented somewhere in Documentation/devicetree/bindings, per: http://marc.info/?l=linux-tegra&m=142201349727836&w=2 Document this requirement in the DT patch submission requirements text file. This second version updates the documentation to align with Rob's comments here: http://marc.info/?l=devicetree&m=142255654213019&w=2 Signed-off-by:
Paul Walmsley <paul@pwsan.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Paul Walmsley <pwalmsley@nvidia.com> Cc: linux-kernel@vger.kernel.org Signed-off-by:
Rob Herring <robh@kernel.org>
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Paul Walmsley authored
Add a compatible string for the NVIDIA Denver CPU to the ARM CPU DT binding documentation file. The primary objective here is to keep checkpatch.pl from warning when the compatible string is used in an SoC DT file, per: http://marc.info/?l=linux-tegra&m=142201349727836&w=2 This second version changes the string from "nvidia,denver" to "nvidia,tegra132-denver" to more precisely describe the revision of the Denver CPU complex that is present in the Tegra132 SoC. Signed-off-by:
Paul Walmsley <paul@pwsan.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Heiko Stuebner <heiko@sntech.de> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Olof Johansson <olof@lixom.net> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Rohit Vaswani <rvaswani@codeaurora.org> Cc: Paul Walmsley <pwalmsley@nvidia.com> Cc: Marc Carino <marc.ceeeee@gmail.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: linux-kernel@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by:
Rob Herring <robh@kernel.org>
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Paul Walmsley authored
Align compatible strings for several IP blocks present on Tegra chips with the latest doctrine from the DT maintainers: http://marc.info/?l=devicetree&m=142255654213019&w=2 The primary objective here is to avoid checkpatch warnings, per: http://marc.info/?l=linux-tegra&m=142201349727836&w=2 DT binding text files have been updated for the following IP blocks: - PCIe - SOR - SoC timers - AHB "gizmo" - APB_MISC - pinmux control - UART - PWM - I2C - SPI - RTC - PMC - eFuse - AHCI - HDA - XUSB_PADCTRL - SDHCI - SOC_THERM - AHUB - I2S - EHCI - USB PHY N.B. The nvidia,tegra20-timer compatible string is removed from the nvidia,tegra30-timer.txt documentation file because it's already mentioned in the nvidia,tegra20-timer.txt documentation file. This second version takes into account the following requests from Rob Herring <robherring2@gmail.com>: - Per-IP block patches have been combined into a single patch - Explicit documentation about which compatible strings are actually matched by the driver has been removed. In its place is implicit documentation that loosely follows Rob's prescribed format: "Must contain '"nvidia,<chip>-pcie", "nvidia,tegra20-pcie"' where <chip> is tegra30, tegra132, ..." [...] "You should attempt to document known values of <chip> if you use it" Signed-off-by:
Paul Walmsley <paul@pwsan.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Dylan Reid <dgreid@chromium.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Jingchang Lu <jingchang.lu@freescale.com> Cc: John Crispin <blogic@openwrt.org> Cc: Kumar Gala <galak@codeaurora.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mikko Perttunen <mperttunen@nvidia.com> Cc: Murali Karicheri <m-karicheri2@ti.com> Cc: Paul Walmsley <pwalmsley@nvidia.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Peter De Schrijver <pdeschrijver@nvidia.com> Cc: Peter Hurley <peter@hurleysoftware.com> Cc: Sean Paul <seanpaul@chromium.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Takashi Iwai <tiwai@suse.de> Cc: Tejun Heo <tj@kernel.org> Cc: "Terje Bergström" <tbergstrom@nvidia.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Tuomas Tynkkynen <ttynkkynen@nvidia.com> Cc: Wolfram Sang <wsa@the-dreams.de> Cc: Zhang Rui <rui.zhang@intel.com> Cc: dri-devel@lists.freedesktop.org Cc: linux-i2c@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-pci@vger.kernel.org Cc: linux-pm@vger.kernel.org Cc: linux-pwm@vger.kernel.org Cc: linux-tegra@vger.kernel.org Acked-by:
Eduardo Valentin <edubezval@gmail.com> Signed-off-by:
Rob Herring <robh@kernel.org>
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Shruti Kanetkar authored
The device tree binding(s) document has fallen out of sync with the driver code. Update the list of supported devices to reflect current driver capabilities Change-Id: I440d8de2ee2d9c3b7b23e69b3da851cab18a4c9a Signed-off-by:
Shruti Kanetkar <Kanetkar.Shruti@gmail.com> Signed-off-by:
Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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- Feb 03, 2015
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Vignesh R authored
This patch reads charge delay from tsc DT node and writes to REG_CHARGEDELAY register. If the charge delay is not specified in DT then default value of 0x400(CHARGEDLY_OPENDLY) is used. Signed-off-by:
Vignesh R <vigneshr@ti.com> Signed-off-by:
Dmitry Torokhov <dmitry.torokhov@gmail.com>
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Rob Herring authored
Add a new compatible string for PXA1928 GPIO controller. The IP block is same as prior chips with a 6th bank added. Signed-off-by:
Rob Herring <robh@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: devicetree@vger.kernel.org Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Jyri Sarha authored
Disables GPIO support and LINE2 input and renames Mic3 input to Mic2, if tlv320aic3104 mode is seleced. Devicetree binding document is updated accordingly. Signed-off-by:
Jyri Sarha <jsarha@ti.com> Signed-off-by:
Mark Brown <broonie@kernel.org>
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- Feb 02, 2015
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Chunyan Zhang authored
Adds Spreadtrum's prefix "sprd" to vendor-prefixes file. Adds the devicetree binding documentations for Spreadtrum's sc9836-uart and SC9836 SoC based on the Sharkl64 Platform which is a 64-bit SoC Platform of Spreadtrum. Signed-off-by:
Chunyan Zhang <chunyan.zhang@spreadtrum.com> Signed-off-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Peter De Schrijver authored
Tegra132 has almost the same clock structure than Tegra124. This patch documents the missing clock IDs. Signed-off-by:
Peter De Schrijver <pdeschrijver@nvidia.com> [paul@pwsan.com: updated binding documentation to reflect the recent split of Tegra124 clock IDs into a Tegra124/132-common file and a Tegra124-specific file] Signed-off-by:
Paul Walmsley <paul@pwsan.com> Signed-off-by:
Paul Walmsley <pwalmsley@nvidia.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org>
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- Feb 01, 2015
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Stephane Viau authored
In the same idea mdp5_cfg was added, this change allows us to quickly add new instances, such as apq8084's HDMI in this case. Signed-off-by:
Stephane Viau <sviau@codeaurora.org> Signed-off-by:
Rob Clark <robdclark@gmail.com>
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