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- Apr 17, 2019
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Leonard Crestez authored
During porting commit ede264ac ("MLK-14982-1 imx8: lpi2c: add ipg clk for lpi2c driver") which replaced the single clk with clk_ipg and clk_per was skipped. Part of the code was later added in commit 96dbdd8c3d0b ("MLK-16713 i2c: imx-lpi2c: add runtime pm support") except the "clk" field was kept and clk_get calls were not updated. Fix imx7ulp boot by fetching both clocks. Fixes: 96dbdd8c3d0b ("MLK-16713 i2c: imx-lpi2c: add runtime pm support") Signed-off-by:
Leonard Crestez <leonard.crestez@nxp.com> Acked-by:
Fugang Duan <fugang.duan@nxp.com>
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Leonard Crestez authored
Signed-off-by: -
Leonard Crestez authored
Signed-off-by: -
Leonard Crestez authored
Copy from rel_imx_4.14.98_2.0.0_ga_rc1 Signed-off-by:
Bai Ping <ping.bai@nxp.com> Signed-off-by:
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Leonard Crestez authored
Copy from rel_imx_4.14.98_2.0.0_ga_rc1 Signed-off-by:
Anson Huang <Anson.Huang@nxp.com> Signed-off-by:
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Leonard Crestez authored
Copy from rel_imx_4.14.98_2.0.0_ga_rc1 Signed-off-by:
Peng Fan <peng.fan@nxp.com> Signed-off-by:
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Leonard Crestez authored
Also disable fbdev dcss (does not build and is not needed) and enable SERIAL_IMX_CONSOLE for debugging on 8m. Signed-off-by: -
Leonard Crestez authored
Signed-off-by: -
Leonard Crestez authored
Copy from rel_imx_4.14.98_2.0.0_ga_rc1 Signed-off-by:
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Leonard Crestez authored
Copy pin header from rel_imx_4.14.98_2.0.0_ga_rc1 and enable compilation. The C code of the driver was already accepted in v4.19 in an acceptable form so we use that. Signed-off-by:
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Leonard Crestez authored
Copy from rel_imx_4.14.98_2.0.0_ga_rc1 Signed-off-by:
Abel Vesa <abel.vesa@nxp.com> Signed-off-by:
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Leonard Crestez authored
Copy from rel_imx_4.14.98_2.0.0_ga_rc1 Signed-off-by:
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Leonard Crestez authored
Upstream commit 3a0ab62f ("serial: imx: implement shadow registers for UCRx and UFCR") made the imx_uart_readl/writel functions use a "cache" to avoid reads/writers to hardware for some registers. Those values need to be initialized once at probe time using real reads from hardware; using imx_uart_readl for this is obviously non-functional Fixes: 372312842fe7 ("tty: serial: imx: use imx_uart_writel() and imx_uart_readl()") This is required for imx8mq to boot and likely fixes other things. Signed-off-by:
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Nitin Garg authored
Fix iMX8MQ workaround to be specific to that machine. Signed-off-by:
Nitin Garg <nitin.garg@nxp.com> (cherry picked from commit 5fc32461)
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Bai Ping authored
On i.MX8MQ, when the CPU core is in power down state, the IPI can NOT wakeup the core anymore(ERR011171), so using the external IRQ32 to wakeup the core in power down idle state successfully. Signed-off-by:
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Bai Ping authored
Enable the system counter timer by default. Signed-off-by:
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Bai Ping authored
On NXP i.MX8MQ SOC, it has system counter module for ARM generic timer implementation. In this system counter module it also has compare frame module to provide timer support. So we can use it as an alternative clockevent device for broadcast timer purpose when CPU core enter power down state with local timer stopped. Signed-off-by:
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Leonard Crestez authored
Signed-off-by: -
Jason Liu authored
on i.MX8QM TO1.0, there is an issue: the bus width between A53-CCI-A72 is limited to 36bits.TLB maintenance through DVM messages over AR channel, some bits will be forced(truncated) to zero as the followings: ASID[15:12] is forced to 0 VA[48:45] is forced to 0 VA[44:41] is forced to 0 VA[39:36] is forced to 0 This issue will result in the TLB aintenance across the clusters not working as expected due to some VA and ASID bits get truncated and forced to be zero. The SW workaround is: use the vmalle1is if VA larger than 36bits or ASID[15:12] is not zero, otherwise, we use original TLB maintenance path. Signed-off-by:
Jason Liu <jason.hui.liu@nxp.com> Reviewed-by:
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Leonard Crestez authored
Copy from rel_imx_4.14.98_2.0.0_ga_rc1 Signed-off-by:
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Leonard Crestez authored
Kconfig snippets based on rel_imx_4.14.98_2.0.0_ga_rc1 Signed-off-by: -
Leonard Crestez authored
Copy from rel_imx_4.14.98_2.0.0_ga_rc1 Signed-off-by: -
Leonard Crestez authored
Copy from rel_imx_4.14.98_2.0.0_ga_rc1 Signed-off-by:
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Leonard Crestez authored
These are used in dts but missing in SCFW headers so copy definitions from imx_4.14.y See MLK-21051 Signed-off-by:
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Leonard Crestez authored
Copy from rel_imx_4.14.98_2.0.0_ga_rc1 Signed-off-by:
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Leonard Crestez authored
Signed-off-by: -
Leonard Crestez authored
Kconfig snippets based on rel_imx_4.14.98_2.0.0_ga_rc1 Signed-off-by: -
Leonard Crestez authored
Copy from rel_imx_4.14.98_2.0.0_ga_rc1 Signed-off-by: -
Leonard Crestez authored
Copy from rel_imx_4.14.98_2.0.0_ga_rc1 and add minor build fix in pinctrl-scu. Signed-off-by:
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Leonard Crestez authored
Copy from rel_imx_4.14.98_2.0.0_ga_rc1 Signed-off-by:
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Leonard Crestez authored
Copy from rel_imx_4.14.98_2.0.0_ga_rc1 Signed-off-by:
Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by:
Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com> Signed-off-by:
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Leonard Crestez authored
Copy from rel_imx_4.14.98_2.0.0_ga_rc1 Signed-off-by: -
Leonard Crestez authored
These are used in dts but missing in SCFW headers so copy definitions from imx_4.14.y See MLK-21051 Signed-off-by:
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Leonard Crestez authored
This is enabled via CONFIG_HAVE_IMX_SC Copy from rel_imx_4.14.98_2.0.0_ga_rc1 Signed-off-by:
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Leonard Crestez authored
This was changed at some point by SC firmware but imx linux releases didn't pick up the change and some drivers don't even compile with a 16-bit sc_rsrc_t. Fix by overwriting SC API with imx_4.14 definition. Signed-off-by: -
Leonard Crestez authored
Uses same layout as imx_4.14.y Signed-off-by:
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Leonard Crestez authored
This file contains many defines for SIP calls to imx ATF. Copy from rel_imx_4.14.98_2.0.0_ga_rc1 Signed-off-by: -
Leonard Crestez authored
If support for imx_src_is_m4_enabled is not compiled then just return the default value "false". Signed-off-by: -
Ranjani Vaidyanathan authored
Implement a CLK_SET_PARENT_NOCACHE flag in clk core for imx8 clk implementation where the parent needs to be restore after PM domain is up. Reviewed-by:
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Leonard Crestez authored
This was incorrectly added to the fec_devtype array only by commit 088c766a5c04 ("MLK-10724-6 net: fec: add i.mx6ul enet support") The rest of 8qm support was later added by commit d1a46676c8b8 ("MLK-16781 net: fec: add eee mode tx lpi support") Signed-off-by:
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