Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes and straggler patches from Olof Johansson:
 "A collection of fixes for fall out from 3.10 merge window, some build
  fixes and warning cleanups and a small handful of patches that were
  small and contained and made sense to still include in 3.10 (some of
  these have also been in -next since the merge window opened).

  Largest continous series is for OMAP, but there's a handful for other
  platforms.

  For i.MX, one of the patches are framebuffer fixups due to fallout
  during the merge window, and the other removes some stale and broken
  code."

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (34 commits)
  ARM: exynos: dts: Fixed vbus-gpios
  ARM: EXYNOS5: Fix kernel dump in AFTR idle mode
  ARM: ux500: Rid ignored return value of regulator_enable() compiler warning
  ARM: ux500: read the correct soc_id number
  ARM: exynos: dts: cros5250: add cyapa trackpad
  video: mxsfb: Adapt to new videomode API
  ARM: imx: Select GENERIC_ALLOCATOR
  ARM: imx: compile fix for hotplug.c
  ARM: dts: don't assume boards are using twl4030 for omap3
  ARM: OMAP2+: Remove bogus IS_ERR_OR_NULL checking from id.c
  ARM: dts: Configure and fix the McSPI pins for 4430sdp
  ARM: dts: AM33XX: Add GPMC node
  ARM: dts: OMAP4460: Fix CPU OPP voltages
  ARM: dts: OMAP36xx: Fix CPU OPP voltages
  ARM: OMAP4+: omap2plus_defconfig: Enable audio via TWL6040 as module
  ARM: OMAP2: AM33XX: id: Add support for new AM335x PG2.1 Si
  omap: mux: add AM/DM37x gpios
  ARM: OMAP1: DMA: fix error handling in omap1_system_dma_init()
  ARM: OMAP2+: omap_device: use late_initcall_sync
  ARM: OMAP: RX-51: change probe order of touchscreen and panel SPI devices
  ...

Documentation/devicetree/bindings/mtd/gpmc-nand.txt

@@ -56,20 +56,20 @@ Example for an AM33xx board:
 			nand-bus-width = <16>;
 			ti,nand-ecc-opt = "bch8";
 
-			gpmc,sync-clk = <0>;
-			gpmc,cs-on = <0>;
-			gpmc,cs-rd-off = <44>;
-			gpmc,cs-wr-off = <44>;
-			gpmc,adv-on = <6>;
-			gpmc,adv-rd-off = <34>;
-			gpmc,adv-wr-off = <44>;
-			gpmc,we-off = <40>;
-			gpmc,oe-off = <54>;
-			gpmc,access = <64>;
-			gpmc,rd-cycle = <82>;
-			gpmc,wr-cycle = <82>;
-			gpmc,wr-access = <40>;
-			gpmc,wr-data-mux-bus = <0>;
+			gpmc,sync-clk-ps = <0>;
+			gpmc,cs-on-ns = <0>;
+			gpmc,cs-rd-off-ns = <44>;
+			gpmc,cs-wr-off-ns = <44>;
+			gpmc,adv-on-ns = <6>;
+			gpmc,adv-rd-off-ns = <34>;
+			gpmc,adv-wr-off-ns = <44>;
+			gpmc,we-off-ns = <40>;
+			gpmc,oe-off-ns = <54>;
+			gpmc,access-ns = <64>;
+			gpmc,rd-cycle-ns = <82>;
+			gpmc,wr-cycle-ns = <82>;
+			gpmc,wr-access-ns = <40>;
+			gpmc,wr-data-mux-bus-ns = <0>;
 
 			#address-cells = <1>;
 			#size-cells = <1>;

Documentation/devicetree/bindings/net/gpmc-eth.txt

@@ -26,16 +26,16 @@ Required properties:
 - bank-width: 		Address width of the device in bytes. GPMC supports 8-bit
 			and 16-bit devices and so must be either 1 or 2 bytes.
 - compatible:		Compatible string property for the ethernet child device.
-- gpmc,cs-on:		Chip-select assertion time
-- gpmc,cs-rd-off:	Chip-select de-assertion time for reads
-- gpmc,cs-wr-off:	Chip-select de-assertion time for writes
-- gpmc,oe-on:		Output-enable assertion time
-- gpmc,oe-off		Output-enable de-assertion time
-- gpmc,we-on:		Write-enable assertion time
-- gpmc,we-off:		Write-enable de-assertion time
-- gpmc,access:		Start cycle to first data capture (read access)
-- gpmc,rd-cycle:	Total read cycle time
-- gpmc,wr-cycle:	Total write cycle time
+- gpmc,cs-on-ns:	Chip-select assertion time
+- gpmc,cs-rd-off-ns:	Chip-select de-assertion time for reads
+- gpmc,cs-wr-off-ns:	Chip-select de-assertion time for writes
+- gpmc,oe-on-ns:	Output-enable assertion time
+- gpmc,oe-off-ns:	Output-enable de-assertion time
+- gpmc,we-on-ns:	Write-enable assertion time
+- gpmc,we-off-ns:	Write-enable de-assertion time
+- gpmc,access-ns:	Start cycle to first data capture (read access)
+- gpmc,rd-cycle-ns:	Total read cycle time
+- gpmc,wr-cycle-ns:	Total write cycle time
 - reg:			Chip-select, base address (relative to chip-select)
 			and size of the memory mapped for the device.
 			Note that base address will be typically 0 as this
@@ -65,24 +65,24 @@ gpmc: gpmc@6e000000 {
 		bank-width = <2>;
 
 		gpmc,mux-add-data;
-		gpmc,cs-on = <0>;
-		gpmc,cs-rd-off = <186>;
-		gpmc,cs-wr-off = <186>;
-		gpmc,adv-on = <12>;
-		gpmc,adv-rd-off = <48>;
-		gpmc,adv-wr-off = <48>;
-		gpmc,oe-on = <54>;
-		gpmc,oe-off = <168>;
-		gpmc,we-on = <54>;
-		gpmc,we-off = <168>;
-		gpmc,rd-cycle = <186>;
-		gpmc,wr-cycle = <186>;
-		gpmc,access = <114>;
-		gpmc,page-burst-access = <6>;
-		gpmc,bus-turnaround = <12>;
-		gpmc,cycle2cycle-delay = <18>;
-		gpmc,wr-data-mux-bus = <90>;
-		gpmc,wr-access = <186>;
+		gpmc,cs-on-ns = <0>;
+		gpmc,cs-rd-off-ns = <186>;
+		gpmc,cs-wr-off-ns = <186>;
+		gpmc,adv-on-ns = <12>;
+		gpmc,adv-rd-off-ns = <48>;
+		gpmc,adv-wr-off-ns = <48>;
+		gpmc,oe-on-ns = <54>;
+		gpmc,oe-off-ns = <168>;
+		gpmc,we-on-ns = <54>;
+		gpmc,we-off-ns = <168>;
+		gpmc,rd-cycle-ns = <186>;
+		gpmc,wr-cycle-ns = <186>;
+		gpmc,access-ns = <114>;
+		gpmc,page-burst-access-ns = <6>;
+		gpmc,bus-turnaround-ns = <12>;
+		gpmc,cycle2cycle-delay-ns = <18>;
+		gpmc,wr-data-mux-bus-ns = <90>;
+		gpmc,wr-access-ns = <186>;
 		gpmc,cycle2cycle-samecsen;
 		gpmc,cycle2cycle-diffcsen;
 

arch/arm/Kconfig

@@ -897,7 +897,6 @@ config ARCH_MULTI_V7
 	bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)"
 	default y
 	select ARCH_MULTI_V6_V7
-	select ARCH_VEXPRESS
 	select CPU_V7
 
 config ARCH_MULTI_V6_V7

arch/arm/boot/dts/am33xx.dtsi

@@ -403,5 +403,17 @@ wkup_m3: wkup_m3@44d00000 {
 			       0x44d80000 0x2000>;	/* M3 DMEM */
 			ti,hwmods = "wkup_m3";
 		};
+
+		gpmc: gpmc@50000000 {
+			compatible = "ti,am3352-gpmc";
+			ti,hwmods = "gpmc";
+			reg = <0x50000000 0x2000>;
+			interrupts = <100>;
+			num-cs = <7>;
+			num-waitpins = <2>;
+			#address-cells = <2>;
+			#size-cells = <1>;
+			status = "disabled";
+		};
 	};
 };

arch/arm/boot/dts/cros5250-common.dtsi

@@ -175,6 +175,14 @@ buck8_reg: BUCK8 {
 	i2c@12C70000 {
 		samsung,i2c-sda-delay = <100>;
 		samsung,i2c-max-bus-freq = <378000>;
+
+		trackpad {
+			reg = <0x67>;
+			compatible = "cypress,cyapa";
+			interrupts = <2 0>;
+			interrupt-parent = <&gpx1>;
+			wakeup-source;
+		};
 	};
 
 	i2c@12C80000 {

arch/arm/boot/dts/exynos5250-smdk5250.dts

@@ -214,7 +214,7 @@ sound {
 	};
 
 	usb@12110000 {
-		samsung,vbus-gpio = <&gpx2 6 1 3 3>;
+		samsung,vbus-gpio = <&gpx2 6 0>;
 	};
 
 	dp-controller {

arch/arm/boot/dts/exynos5250-snow.dts

@@ -183,7 +183,7 @@ slot@0 {
 	};
 
 	usb@12110000 {
-		samsung,vbus-gpio = <&gpx1 1 1 3 3>;
+		samsung,vbus-gpio = <&gpx1 1 0>;
 	};
 
 	fixed-rate-clocks {

arch/arm/boot/dts/omap3-beagle-xm.dts

@@ -122,6 +122,7 @@ &twl_gpio {
 
 &usb_otg_hs {
 	interface-type = <0>;
+	usb-phy = <&usb2_phy>;
 	mode = <3>;
 	power = <50>;
 };

arch/arm/boot/dts/omap3-evm.dts

@@ -68,6 +68,7 @@ &twl_gpio {
 
 &usb_otg_hs {
 	interface-type = <0>;
+	usb-phy = <&usb2_phy>;
 	mode = <3>;
 	power = <50>;
 };

arch/arm/boot/dts/omap3-overo.dtsi

@@ -73,6 +73,7 @@ &twl_gpio {
 
 &usb_otg_hs {
 	interface-type = <0>;
+	usb-phy = <&usb2_phy>;
 	mode = <3>;
 	power = <50>;
 };

arch/arm/boot/dts/omap3.dtsi

@@ -519,7 +519,6 @@ usb_otg_hs: usb_otg_hs@480ab000 {
 			interrupts = <0 92 0x4>, <0 93 0x4>;
 			interrupt-names = "mc", "dma";
 			ti,hwmods = "usb_otg_hs";
-			usb-phy = <&usb2_phy>;
 			multipoint = <1>;
 			num-eps = <16>;
 			ram-bits = <12>;

arch/arm/boot/dts/omap36xx.dtsi

@@ -20,9 +20,9 @@ cpus {
 		cpu@0 {
 			operating-points = <
 				/* kHz    uV */
-				300000   975000
-				600000  1075000
-				800000  1200000
+				300000  1012500
+				600000  1200000
+				800000  1325000
 			>;
 			clock-latency = <300000>; /* From legacy driver */
 		};

arch/arm/boot/dts/omap4-sdp.dts

@@ -223,6 +223,15 @@ mcbsp2_pins: pinmux_mcbsp2_pins {
 		>;
 	};
 
+	mcspi1_pins: pinmux_mcspi1_pins {
+		pinctrl-single,pins = <
+			0xf2 0x100	/*  mcspi1_clk.mcspi1_clk INPUT | MODE0 */
+			0xf4 0x100	/*  mcspi1_somi.mcspi1_somi INPUT | MODE0 */
+			0xf6 0x100	/*  mcspi1_simo.mcspi1_simo INPUT | MODE0 */
+			0xf8 0x100	/*  mcspi1_cs0.mcspi1_cs0 INPUT | MODE0*/
+		>;
+	};
+
 	dss_hdmi_pins: pinmux_dss_hdmi_pins {
 		pinctrl-single,pins = <
 			0x5a 0x118	/* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */
@@ -358,12 +367,15 @@ hmc5843@1e {
 };
 
 &mcspi1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mcspi1_pins>;
+
 	eth@0 {
 		compatible = "ks8851";
 		spi-max-frequency = <24000000>;
 		reg = <0>;
 		interrupt-parent = <&gpio2>;
-		interrupts = <2>; /* gpio line 34 */
+		interrupts = <2 8>; /* gpio line 34, low triggered */
 		vdd-supply = <&vdd_eth>;
 	};
 };

arch/arm/boot/dts/omap4-var-som.dts

@@ -68,7 +68,7 @@ eth@0 {
 		spi-max-frequency = <24000000>;
 		reg = <0>;
 		interrupt-parent = <&gpio6>;
-		interrupts = <11>; /* gpio line 171 */
+		interrupts = <11 8>; /* gpio line 171, low triggered */
 		vdd-supply = <&vdd_eth>;
 	};
 };

arch/arm/boot/dts/omap4460.dtsi

@@ -15,9 +15,9 @@ cpus {
 		cpu@0 {
 			operating-points = <
 				/* kHz    uV */
-				350000   975000
-				700000  1075000
-				920000  1200000
+				350000  1025000
+				700000  1200000
+				920000  1313000
 			>;
 			clock-latency = <300000>; /* From legacy driver */
 		};

arch/arm/configs/omap2plus_defconfig

@@ -137,6 +137,8 @@ CONFIG_SERIAL_8250_DETECT_IRQ=y
 CONFIG_SERIAL_8250_RSA=y
 CONFIG_SERIAL_AMBA_PL011=y
 CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_SERIAL_OMAP=y
+CONFIG_SERIAL_OMAP_CONSOLE=y
 CONFIG_HW_RANDOM=y
 CONFIG_I2C_CHARDEV=y
 CONFIG_SPI=y
@@ -153,6 +155,7 @@ CONFIG_OMAP_WATCHDOG=y
 CONFIG_TWL4030_WATCHDOG=y
 CONFIG_MFD_TPS65217=y
 CONFIG_MFD_TPS65910=y
+CONFIG_TWL6040_CORE=y
 CONFIG_REGULATOR_TWL4030=y
 CONFIG_REGULATOR_TPS65023=y
 CONFIG_REGULATOR_TPS6507X=y
@@ -195,6 +198,7 @@ CONFIG_SND_USB_AUDIO=m
 CONFIG_SND_SOC=m
 CONFIG_SND_OMAP_SOC=m
 CONFIG_SND_OMAP_SOC_OMAP_TWL4030=m
+CONFIG_SND_OMAP_SOC_OMAP_ABE_TWL6040=m
 CONFIG_SND_OMAP_SOC_OMAP3_PANDORA=m
 CONFIG_USB=y
 CONFIG_USB_DEBUG=y

arch/arm/kernel/devtree.c

@@ -180,6 +180,13 @@ struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys)
 	unsigned long dt_root;
 	const char *model;
 
+#ifdef CONFIG_ARCH_MULTIPLATFORM
+	DT_MACHINE_START(GENERIC_DT, "Generic DT based system")
+	MACHINE_END
+
+	mdesc_best = (struct machine_desc *)&__mach_desc_GENERIC_DT;
+#endif
+
 	if (!dt_phys)
 		return NULL;
 

arch/arm/kernel/setup.c

@@ -18,6 +18,7 @@
 #include <linux/bootmem.h>
 #include <linux/seq_file.h>
 #include <linux/screen_info.h>
+#include <linux/of_platform.h>
 #include <linux/init.h>
 #include <linux/kexec.h>
 #include <linux/of_fdt.h>
@@ -659,9 +660,19 @@ struct screen_info screen_info = {
 
 static int __init customize_machine(void)
 {
-	/* customizes platform devices, or adds new ones */
+	/*
+	 * customizes platform devices, or adds new ones
+	 * On DT based machines, we fall back to populating the
+	 * machine from the device tree, if no callback is provided,
+	 * otherwise we would always need an init_machine callback.
+	 */
 	if (machine_desc->init_machine)
 		machine_desc->init_machine();
+#ifdef CONFIG_OF
+	else
+		of_platform_populate(NULL, of_default_bus_match_table,
+					NULL, NULL);
+#endif
 	return 0;
 }
 arch_initcall(customize_machine);

arch/arm/mach-exynos/include/mach/regs-pmu.h

@@ -344,6 +344,7 @@
 #define EXYNOS5_FSYS_ARM_OPTION					S5P_PMUREG(0x2208)
 #define EXYNOS5_ISP_ARM_OPTION					S5P_PMUREG(0x2288)
 #define EXYNOS5_ARM_COMMON_OPTION				S5P_PMUREG(0x2408)
+#define EXYNOS5_ARM_L2_OPTION					S5P_PMUREG(0x2608)
 #define EXYNOS5_TOP_PWR_OPTION					S5P_PMUREG(0x2C48)
 #define EXYNOS5_TOP_PWR_SYSMEM_OPTION				S5P_PMUREG(0x2CC8)
 #define EXYNOS5_JPEG_MEM_OPTION					S5P_PMUREG(0x2F48)

arch/arm/mach-exynos/pmu.c

@@ -228,6 +228,7 @@ static struct exynos_pmu_conf exynos5250_pmu_config[] = {
 	{ EXYNOS5_DIS_IRQ_ISP_ARM_CENTRAL_SYS_PWR_REG,	{ 0x0, 0x0, 0x0} },
 	{ EXYNOS5_ARM_COMMON_SYS_PWR_REG,		{ 0x0, 0x0, 0x2} },
 	{ EXYNOS5_ARM_L2_SYS_PWR_REG,			{ 0x3, 0x3, 0x3} },
+	{ EXYNOS5_ARM_L2_OPTION,			{ 0x10, 0x10, 0x0 } },
 	{ EXYNOS5_CMU_ACLKSTOP_SYS_PWR_REG,		{ 0x1, 0x0, 0x1} },
 	{ EXYNOS5_CMU_SCLKSTOP_SYS_PWR_REG,		{ 0x1, 0x0, 0x1} },
 	{ EXYNOS5_CMU_RESET_SYS_PWR_REG,		{ 0x1, 0x1, 0x0} },
@@ -353,11 +354,9 @@ static void exynos5_init_pmu(void)
 
 	/*
 	 * SKIP_DEACTIVATE_ACEACP_IN_PWDN_BITFIELD Enable
-	 * MANUAL_L2RSTDISABLE_CONTROL_BITFIELD Enable
 	 */
 	tmp = __raw_readl(EXYNOS5_ARM_COMMON_OPTION);
-	tmp |= (EXYNOS5_MANUAL_L2RSTDISABLE_CONTROL |
-		EXYNOS5_SKIP_DEACTIVATE_ACEACP_IN_PWDN);
+	tmp |= EXYNOS5_SKIP_DEACTIVATE_ACEACP_IN_PWDN;
 	__raw_writel(tmp, EXYNOS5_ARM_COMMON_OPTION);
 
 	/*