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Commit e5a5de44 authored by Russell King's avatar Russell King
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ARM: enable ARM errata 643719 workaround by default


The effects of not having ARM errata 643719 enabled on affected CPUs
can be very confusing and hard to debug.  Rather than leave this to
chance, enable this workaround by default.  Now that we have rearranged
the code, it should have a low impact on the majority of CPUs.

Acked-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Reviewed-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent aaf4b5d9
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...@@ -1127,6 +1127,7 @@ config ARM_ERRATA_742231 ...@@ -1127,6 +1127,7 @@ config ARM_ERRATA_742231
config ARM_ERRATA_643719 config ARM_ERRATA_643719
bool "ARM errata: LoUIS bit field in CLIDR register is incorrect" bool "ARM errata: LoUIS bit field in CLIDR register is incorrect"
depends on CPU_V7 && SMP depends on CPU_V7 && SMP
default y
help help
This option enables the workaround for the 643719 Cortex-A9 (prior to This option enables the workaround for the 643719 Cortex-A9 (prior to
r1p0) erratum. On affected cores the LoUIS bit field of the CLIDR r1p0) erratum. On affected cores the LoUIS bit field of the CLIDR
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