MIPS: Alchemy: support multiple GPIO styles in one kernel
For GPIOLIB=y decide at runtime which gpiochips to register; in the GPIOLIB=n case, the gpio headers need to be reshuffled a bit to make multiple implementations coexist peacefully. Signed-off-by:Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2679/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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- arch/mips/alchemy/common/Makefile 1 addition, 3 deletionsarch/mips/alchemy/common/Makefile
- arch/mips/alchemy/common/gpiolib.c 21 additions, 14 deletionsarch/mips/alchemy/common/gpiolib.c
- arch/mips/include/asm/mach-au1x00/gpio-au1000.h 2 additions, 29 deletionsarch/mips/include/asm/mach-au1x00/gpio-au1000.h
- arch/mips/include/asm/mach-au1x00/gpio.h 76 additions, 3 deletionsarch/mips/include/asm/mach-au1x00/gpio.h
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