MLK-14981-1 arm64: dts: enable i2c for imx8qm

1. enable lpi2c of lvds, hdmi and DMA subsystem
2. change dts property assigned-clock-name to assigned-clocks
3. enable gpio expander pca9557

Signed-off-by: Gao Pan <pandy.gao@nxp.com>

arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts

@@ -83,6 +83,20 @@ SC_P_ENET1_RGMII_RXD3_CONN_ENET1_RGMII_RXD3	0x06000048
 			>;
 		};
 
+		pinctrl_hdmi_lpi2c0: hdmilpi2c0grp {
+			fsl,pins = <
+				SC_P_HDMI_TX0_TS_SCL_HDMI_TX0_I2C0_SCL  0xc600004c
+				SC_P_HDMI_TX0_TS_SDA_HDMI_TX0_I2C0_SDA  0xc600004c
+			>;
+		};
+
+		pinctrl_lpi2c1: lpi2c1grp {
+			fsl,pins = <
+				SC_P_GPT0_CLK_DMA_I2C1_SCL              0xc600004c
+				SC_P_GPT0_CAPTURE_DMA_I2C1_SDA          0xc600004c
+			>;
+		};
+
 		pinctrl_lpuart0: lpuart0grp {
 			fsl,pins = <
 				SC_P_UART0_RX_DMA_UART0_RX		0x0600004c
@@ -285,10 +299,50 @@ flash0: mt35xu512aba@0 {
 	};
 };
 
+&i2c0_hdmi {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_hdmi_lpi2c0>;
+	clock-frequency = <100000>;
+	status = "okay";
+};
+
 &i2c1 {
+	#address-cells = <1>;
+	#size-cells = <0>;
 	clock-frequency = <100000>;
 	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_lpi2c1>;
 	status = "okay";
+
+	pca9557_a: gpio@18 {
+		compatible = "nxp,pca9557";
+		reg = <0x18>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+
+	pca9557_b: gpio@19 {
+		compatible = "nxp,pca9557";
+		reg = <0x19>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+
+	pca9557_c: gpio@1b {
+		compatible = "nxp,pca9557";
+		reg = <0x1b>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+
+	pca9557_d: gpio@1f {
+		compatible = "nxp,pca9557";
+		reg = <0x1f>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
 };
 
 &i2c1_lvds0 {

arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi

@@ -155,6 +155,21 @@ pd_lvds0_pwm: PD_LVDS0_PWM {
 					power-domains =<&pd_lvds0>;
 				};
 			};
+
+			pd_hdmi: PD_HDMI {
+				reg = <SC_R_HDMI>;
+				#power-domain-cells = <0>;
+				power-domains =<&pd_dc0>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				pd_hdmi_i2c0: PD_HDMI_I2C_0 {
+					reg = <SC_R_HDMI_I2C_0>;
+					#power-domain-cells = <0>;
+					power-domains =<&pd_hdmi>;
+				};
+			};
+
 		};
 
 		pd_dc1: PD_DC_1 {
@@ -773,6 +788,7 @@ i2c1: i2c@5a810000 {
 		clock-names = "per";
 		assigned-clocks = <&clk IMX8QM_I2C1_CLK>;
 		assigned-clock-rates = <24000000>;
+		power-domains = <&pd_dma_lpi2c1>;
 		status = "disabled";
 	};
 
@@ -815,6 +831,29 @@ i2c4: i2c@5a840000 {
 		status = "disabled";
 	};
 
+	irqsteer_hdmi: irqsteer@56260000 {
+		compatible = "nxp,imx-irqsteer";
+		reg = <0x0 0x56260000 0x0 0x1000>;
+		interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-controller;
+		interrupt-parent = <&gic>;
+		#interrupt-cells = <2>;
+		power-domains = <&pd_hdmi_i2c0>;
+	};
+
+	i2c0_hdmi: i2c@56266000 {
+		compatible = "fsl,imx8dv-lpi2c";
+		reg = <0x0 0x56266000 0x0 0x1000>;
+		interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-parent = <&irqsteer_hdmi>;
+		clocks = <&clk IMX8QM_HDMI_I2C0_CLK>;
+		clock-names = "per";
+		assigned-clocks = <&clk IMX8QM_HDMI_I2C0_CLK>;
+		assigned-clock-rates = <24000000>;
+		power-domains = <&pd_hdmi_i2c0>;
+		status = "disabled";
+	};
+
 	i2c1_lvds0: i2c@56247000 {
 		compatible = "fsl,imx8qm-lpi2c";
 		reg = <0x0 0x56247000 0x0 0x1000>;