Merge master.kernel.org:/home/rmk/linux-2.6-arm

* master.kernel.org:/home/rmk/linux-2.6-arm:
  ARM: GIC: don't disable software generated interrupts
  ARM: 6472/1: vexpress ct-ca9x4: only set twd_base if local timers are being used
  ARM: arch/arm/kernel/traps.c: Convert sprintf_symbol to %pS
  ARM: arch/arm/kernel/hw_breakpoint.c: Convert WARN_ON to WARN
  ARM: 6462/1: EP93xx: Document DMA M2P API
  ARM: 6470/1: atomic64: use generic implementation for OABI configurations
  ARM: 6469/1: perf-events: squash compiler warning
  ARM: 6468/1: backtrace: fix calculation of thread stack base
  ARM: Fix DMA coherent allocator alignment
  ARM: orion5x/kirkwood/mv78xx0: fix MPP configuration corner cases
  [ARM] TS-78xxx NAND resource type should be IORESOURCE_MEM
  ARM: pxa/saar: fix the building failure caused by typo
  ARM: pxa/cm-x2xx: remove duplicate call to pxa27x_init_irq
  ARM: pxa: fix the missing definition of IRQ_BOARD_END
  ARM: mmp: fix cpuid detection on mmp2
  [ARM] Kirkwood: restrict the scope of the PCIe reset workaround
  [ARM] Kirkwood: fix timer initialization for LaCie boards
  [ARM] Kirkwood: enhance TCLK detection

arch/arm/mach-orion5x/ts78xx-setup.c

@@ -239,7 +239,7 @@ static struct platform_nand_data ts78xx_ts_nand_data = {
 static struct resource ts78xx_ts_nand_resources = {
 	.start		= TS_NAND_DATA,
 	.end		= TS_NAND_DATA + 4,
-	.flags		= IORESOURCE_IO,
+	.flags		= IORESOURCE_MEM,
 };
 
 static struct platform_device ts78xx_ts_nand_device = {

arch/arm/mach-pxa/cm-x2xx.c

@@ -476,8 +476,6 @@ static void __init cmx2xx_init(void)
 
 static void __init cmx2xx_init_irq(void)
 {
-	pxa27x_init_irq();
-
 	if (cpu_is_pxa25x()) {
 		pxa25x_init_irq();
 		cmx2xx_pci_init_irq(CMX255_GPIO_IT8152_IRQ);

arch/arm/mach-pxa/saar.c

@@ -116,7 +116,7 @@ static struct platform_device smc91x_device = {
 	},
 };
 
-#if defined(CONFIG_FB_PXA) || (CONFIG_FB_PXA_MODULE)
+#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
 static uint16_t lcd_power_on[] = {
 	/* single frame */
 	SMART_CMD_NOOP,

arch/arm/mach-vexpress/ct-ca9x4.c

@@ -54,7 +54,9 @@ static struct map_desc ct_ca9x4_io_desc[] __initdata = {
 
 static void __init ct_ca9x4_map_io(void)
 {
+#ifdef CONFIG_LOCAL_TIMERS
 	twd_base = MMIO_P2V(A9_MPCORE_TWD);
+#endif
 	v2m_map_io(ct_ca9x4_io_desc, ARRAY_SIZE(ct_ca9x4_io_desc));
 }
 

arch/arm/mm/dma-mapping.c

@@ -198,7 +198,7 @@ __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot)
 	 * fragmentation of the DMA space, and also prevents allocations
 	 * smaller than a section from crossing a section boundary.
 	 */
-	bit = fls(size - 1) + 1;
+	bit = fls(size - 1);
 	if (bit > SECTION_SHIFT)
 		bit = SECTION_SHIFT;
 	align = 1 << bit;

arch/arm/plat-orion/include/plat/pcie.h

@@ -11,12 +11,15 @@
 #ifndef __PLAT_PCIE_H
 #define __PLAT_PCIE_H
 
+struct pci_bus;
+
 u32 orion_pcie_dev_id(void __iomem *base);
 u32 orion_pcie_rev(void __iomem *base);
 int orion_pcie_link_up(void __iomem *base);
 int orion_pcie_x4_mode(void __iomem *base);
 int orion_pcie_get_local_bus_nr(void __iomem *base);
 void orion_pcie_set_local_bus_nr(void __iomem *base, int nr);
+void orion_pcie_reset(void __iomem *base);
 void orion_pcie_setup(void __iomem *base,
 		      struct mbus_dram_target_info *dram);
 int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus,

arch/arm/plat-orion/pcie.c

@@ -181,11 +181,6 @@ void __init orion_pcie_setup(void __iomem *base,
 	u16 cmd;
 	u32 mask;
 
-	/*
-	 * soft reset PCIe unit
-	 */
-	orion_pcie_reset(base);
-
 	/*
 	 * Point PCIe unit MBUS decode windows to DRAM space.
 	 */