[C26][DT] enable usdhc3 SDIO_PWR, RESET pinmux

arch/arm64/boot/dts/seco/seco-imx8qm-c26.dts

@@ -116,6 +116,8 @@
 			regulator-name = "sw-3p3-sd2";
 			regulator-min-microvolt = <3300000>;
 			regulator-max-microvolt = <3300000>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_reg_usdhc3_vmmc>;
 			gpio = <&lsio_gpio4 9 GPIO_ACTIVE_HIGH>;
 			off-on-delay = <4800>;
 			enable-active-high;
@@ -126,6 +128,8 @@
 			regulator-name = "sw-3p3-sd2-sdiopwr";
 			regulator-min-microvolt = <3300000>;
 			regulator-max-microvolt = <3300000>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_reg_usdhc3_sdiopwr>;
 			gpio = <&lsio_gpio2 4 GPIO_ACTIVE_LOW>;
 			regulator-always-on;
 			enable-active-low;
@@ -904,12 +908,9 @@ ldb1_backlight: lvds_backlight@0 {
 	imx8qm-c26 {
 		pinctrl_hog: hoggrp {
 			fsl,pins = <
-			
 				IMX8QM_MCLK_OUT0_AUD_ACM_MCLK_OUT0	0x0600004c
 				IMX8QM_QSPI1A_DATA1_LSIO_GPIO4_IO25	0x0600004c
 				IMX8QM_SCU_GPIO0_03_LSIO_GPIO0_IO31	0x0600004c
-				/* SDIO_PWR */
-				//IMX8QM_ESAI1_FSR_LSIO_GPIO2_IO04		0x00000021
 				/* PCIE CLK OE 1 */
 				IMX8QM_ENET1_RGMII_TXD0_LSIO_GPIO6_IO12	0x00000021
 				/* PCIE CLK OE 0 */