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Commit 8e3f27bb authored by Nick Desaulniers's avatar Nick Desaulniers Committed by Greg Kroah-Hartman
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ARM: 9087/1: kprobes: test-thumb: fix for LLVM_IAS=1

[ Upstream commit 8b95a7d9 ]

There's a few instructions that GAS infers operands but Clang doesn't;
from what I can tell the Arm ARM doesn't say these are optional.

F5.1.257 TBB, TBH T1 Halfword variant
F5.1.238 STREXD T1 variant
F5.1.84 LDREXD T1 variant

Link: https://github.com/ClangBuiltLinux/linux/issues/1309



Signed-off-by: default avatarNick Desaulniers <ndesaulniers@google.com>
Reviewed-by: default avatarJian Cai <jiancai@google.com>
Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent 9d829ca4
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...@@ -441,21 +441,21 @@ void kprobe_thumb32_test_cases(void) ...@@ -441,21 +441,21 @@ void kprobe_thumb32_test_cases(void)
"3: mvn r0, r0 \n\t" "3: mvn r0, r0 \n\t"
"2: nop \n\t") "2: nop \n\t")
TEST_RX("tbh [pc, r",7, (9f-(1f+4))>>1,"]", TEST_RX("tbh [pc, r",7, (9f-(1f+4))>>1,", lsl #1]",
"9: \n\t" "9: \n\t"
".short (2f-1b-4)>>1 \n\t" ".short (2f-1b-4)>>1 \n\t"
".short (3f-1b-4)>>1 \n\t" ".short (3f-1b-4)>>1 \n\t"
"3: mvn r0, r0 \n\t" "3: mvn r0, r0 \n\t"
"2: nop \n\t") "2: nop \n\t")
TEST_RX("tbh [pc, r",12, ((9f-(1f+4))>>1)+1,"]", TEST_RX("tbh [pc, r",12, ((9f-(1f+4))>>1)+1,", lsl #1]",
"9: \n\t" "9: \n\t"
".short (2f-1b-4)>>1 \n\t" ".short (2f-1b-4)>>1 \n\t"
".short (3f-1b-4)>>1 \n\t" ".short (3f-1b-4)>>1 \n\t"
"3: mvn r0, r0 \n\t" "3: mvn r0, r0 \n\t"
"2: nop \n\t") "2: nop \n\t")
TEST_RRX("tbh [r",1,9f, ", r",14,1,"]", TEST_RRX("tbh [r",1,9f, ", r",14,1,", lsl #1]",
"9: \n\t" "9: \n\t"
".short (2f-1b-4)>>1 \n\t" ".short (2f-1b-4)>>1 \n\t"
".short (3f-1b-4)>>1 \n\t" ".short (3f-1b-4)>>1 \n\t"
...@@ -468,10 +468,10 @@ void kprobe_thumb32_test_cases(void) ...@@ -468,10 +468,10 @@ void kprobe_thumb32_test_cases(void)
TEST_UNSUPPORTED("strexb r0, r1, [r2]") TEST_UNSUPPORTED("strexb r0, r1, [r2]")
TEST_UNSUPPORTED("strexh r0, r1, [r2]") TEST_UNSUPPORTED("strexh r0, r1, [r2]")
TEST_UNSUPPORTED("strexd r0, r1, [r2]") TEST_UNSUPPORTED("strexd r0, r1, r2, [r2]")
TEST_UNSUPPORTED("ldrexb r0, [r1]") TEST_UNSUPPORTED("ldrexb r0, [r1]")
TEST_UNSUPPORTED("ldrexh r0, [r1]") TEST_UNSUPPORTED("ldrexh r0, [r1]")
TEST_UNSUPPORTED("ldrexd r0, [r1]") TEST_UNSUPPORTED("ldrexd r0, r1, [r1]")
TEST_GROUP("Data-processing (shifted register) and (modified immediate)") TEST_GROUP("Data-processing (shifted register) and (modified immediate)")
......
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