MLK-20940-5 ARM64: dts: Add virtual i2c driver support for 8QXP/QM

Add new dts and dtsi file for virtual i2c driver on i.MX8QXP and i.MX8QM
board.

Merge fsl-imx8qm/8qxp-mek-m4.dts to fsl-imx8qm/8qxp-mek-rpmsg.dtsi. So
delete these two files.

Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>

arch/arm64/boot/dts/freescale/Makefile

@@ -22,6 +22,7 @@ dtb-$(CONFIG_ARCH_FSL_IMX8QM) += fsl-imx8qm-lpddr4-arm2.dtb \
 				 fsl-imx8qm-lpddr4-arm2_ca53.dtb \
 				 fsl-imx8qm-lpddr4-arm2_ca72.dtb \
 				 fsl-imx8qm-mek.dtb \
+				 fsl-imx8qm-mek-rpmsg.dtb \
 				 fsl-imx8qm-mek-dsp.dtb \
 				 fsl-imx8qm-mek-ov5640.dtb \
 				 fsl-imx8qm-mek_ca53.dtb \
@@ -39,7 +40,6 @@ dtb-$(CONFIG_ARCH_FSL_IMX8QM) += fsl-imx8qm-lpddr4-arm2.dtb \
 				 fsl-imx8qm-mek-domu-dpu1-hdmi.dtb \
 				 fsl-imx8qm-mek-root.dtb \
 				 fsl-imx8qm-mek-inmate.dtb \
-				 fsl-imx8qm-mek-m4.dtb \
 				 fsl-imx8qm-lpddr4-arm2-dp.dtb \
 				 fsl-imx8qm-lpddr4-arm2-hdmi.dtb \
 				 fsl-imx8qm-lpddr4-arm2-hdmi-in.dtb \
@@ -59,9 +59,11 @@ dtb-$(CONFIG_ARCH_FSL_IMX8QM) += fsl-imx8qm-lpddr4-arm2.dtb \
 				 fsl-imx8qm-lpddr4-arm2-dp-dig-pll.dtb
 dtb-$(CONFIG_ARCH_FSL_IMX8QXP) += fsl-imx8qxp-lpddr4-arm2.dtb \
 				  fsl-imx8qxp-mek.dtb \
+				  fsl-imx8qxp-mek-rpmsg.dtb \
 				  fsl-imx8qxp-mek-dsp.dtb \
 				  fsl-imx8qxp-mek-dom0.dtb \
 				  fsl-imx8qxp-mek-ov5640.dtb \
+				  fsl-imx8qxp-mek-ov5640-rpmsg.dtb \
 				  fsl-imx8qxp-mek-enet2.dtb \
 				  fsl-imx8qxp-mek-enet2-tja1100.dtb \
 				  fsl-imx8qxp-mek-dsi-rm67191.dtb \
@@ -72,7 +74,6 @@ dtb-$(CONFIG_ARCH_FSL_IMX8QXP) += fsl-imx8qxp-lpddr4-arm2.dtb \
 				  fsl-imx8qxp-mek-jdi-wuxga-lvds0-panel.dtb \
 				  fsl-imx8qxp-mek-jdi-wuxga-lvds1-panel.dtb \
 				  fsl-imx8qxp-mek-root.dtb \
-				  fsl-imx8qxp-mek-m4.dtb \
 				  fsl-imx8qxp-mek-inmate.dtb \
 				  fsl-imx8qxp-lpddr4-arm2-enet2.dtb \
 				  fsl-imx8qxp-lpddr4-arm2-enet2-tja1100.dtb \

arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi

@@ -64,6 +64,12 @@ aliases {
 		can0 = &flexcan1;
 		can1 = &flexcan2;
 		can2 = &flexcan3;
+		i2c1 = &i2c_rpbus_1;
+		i2c5 = &i2c_rpbus_5;
+		i2c12 = &i2c_rpbus_12;
+		i2c13 = &i2c_rpbus_13;
+		i2c14 = &i2c_rpbus_14;
+		i2c15 = &i2c_rpbus_15;
 	};
 
 	cpus {
@@ -2295,6 +2301,36 @@ jpegenc: jpegenc@58450000 {
 		};
 	};
 
+	i2c_rpbus_1: i2c-rpbus-1 {
+		compatible = "fsl,i2c-rpbus";
+		status = "disabled";
+	};
+
+	i2c_rpbus_5: i2c-rpbus-5 {
+		compatible = "fsl,i2c-rpbus";
+		status = "disabled";
+	};
+
+	i2c_rpbus_12: i2c-rpbus-12 {
+		compatible = "fsl,i2c-rpbus";
+		status = "disabled";
+	};
+
+	i2c_rpbus_13: i2c-rpbus-13 {
+		compatible = "fsl,i2c-rpbus";
+		status = "disabled";
+	};
+
+	i2c_rpbus_14: i2c-rpbus-14 {
+		compatible = "fsl,i2c-rpbus";
+		status = "disabled";
+	};
+
+	i2c_rpbus_15: i2c-rpbus-15 {
+		compatible = "fsl,i2c-rpbus";
+		status = "disabled";
+	};
+
 	pwm_mipi_lvds1: pwm@56244000 {
 		compatible = "fsl,imx8qxp-pwm", "fsl,imx27-pwm";
 		reg = <0x0 0x56244000 0 0x1000>;

arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi

@@ -4393,6 +4393,16 @@ caam_sm: caam-sm@31800000 {
 		reg = <0 0x31800000 0 0x10000>;
 	};
 
+	i2c_rpbus_0: i2c-rpbus-0 {
+		compatible = "fsl,i2c-rpbus";
+		status = "disabled";
+	};
+
+	i2c_rpbus_1: i2c-rpbus-1 {
+		compatible = "fsl,i2c-rpbus";
+		status = "disabled";
+	};
+
 	sc_pwrkey: sc-powerkey {
 		compatible = "fsl,imx8-pwrkey";
 		linux,keycode = <KEY_POWER>;

arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-rpmsg.dts

+/*
+ * Copyright 2019 NXP
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/dts-v1/;
+
+#include "fsl-imx8qm-mek-rpmsg.dtsi"

arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-m4.dts → arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-rpmsg.dtsi

 /*
- * Copyright 2018 NXP
+ * Copyright 2019 NXP
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License
@@ -12,48 +12,60 @@
  * GNU General Public License for more details.
  */
 
-#include "fsl-imx8qm-mek.dts"
+#include "fsl-imx8qm-mek.dtsi"
 
-/ {
-	sound-cs42888 {
-		status = "disabled";
+/delete-node/ &i2c0_cm41;
+
+&i2c_rpbus_1 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+
+	pca6416: gpio@20 {
+		compatible = "ti,tca6416";
+		reg = <0x20>;
+		gpio-controller;
+		#gpio-cells = <2>;
 	};
 
-	rpmsg_i2s: rpmsg-i2s {
-		compatible = "fsl,imx8qm-rpmsg-i2s";
-		/* the audio device index in m4 domain */
-		fsl,audioindex = <0>;
+	cs42888: cs42888@48 {
+		compatible = "cirrus,cs42888";
+		reg = <0x48>;
 		clocks = <&clk IMX8QM_AUD_MCLKOUT0>;
 		clock-names = "mclk";
+		VA-supply = <&reg_audio>;
+		VD-supply = <&reg_audio>;
+		VLS-supply = <&reg_audio>;
+		VLC-supply = <&reg_audio>;
+		reset-gpio = <&gpio4 25 1>;
 		power-domains = <&pd_mclk_out0>;
 		assigned-clocks = <&clk IMX8QM_AUD_PLL0_DIV>,
 				<&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_DIV>,
 				<&clk IMX8QM_AUD_ACM_AUD_REC_CLK0_DIV>,
 				<&clk IMX8QM_AUD_MCLKOUT0>;
 		assigned-clock-rates = <786432000>, <49152000>, <12288000>, <12288000>;
-		VA-supply = <&reg_audio>;
-		VD-supply = <&reg_audio>;
-		VLS-supply = <&reg_audio>;
-		VLC-supply = <&reg_audio>;
-		reset-gpio = <&gpio4 25 1>;
 		fsl,txs-rxm;
 		status = "okay";
 	};
+};
 
-	sound-rpmsg-cs42888 {
-		compatible = "fsl,imx8qm-sabreauto-cs42888",
-				"fsl,imx-audio-cs42888";
-		model = "imx-cs42888";
-		esai-controller = <&esai0>;
-		asrc-controller = <&asrc0>;
-		audio-codec = <&rpmsg_i2s>;
-		codec-rpmsg;
-		status = "okay";
-	};
+&rpmsg{
+	/*
+	 * 64K for one rpmsg instance:
+	 */
+	vdev-nums = <2>;
+	reg = <0x0 0x90000000 0x0 0x20000>;
+	status = "okay";
 };
 
-&i2c0_cm41 {
-	status = "disabled";
+&rpmsg1{
+	/*
+	 * 64K for one rpmsg instance, using 2 instance
+	 * 0x90110000 - 0x9011FFFF: audio
+	 */
+	vdev-nums = <2>;
+	reg = <0x0 0x90100000 0x0 0x20000>;
+	status = "okay";
 };
 
 &intmux_cm41 {
@@ -79,22 +91,3 @@ &flexcan3 {
 &flexspi0 {
 	status = "disabled";
 };
-
-&rpmsg{
-	/*
-	 * 64K for one rpmsg instance:
-	 */
-	vdev-nums = <2>;
-	reg = <0x0 0x90000000 0x0 0x20000>;
-	status = "okay";
-};
-
-&rpmsg1{
-	/*
-	 * 64K for one rpmsg instance, using 2 instance
-	 * 0x90110000 - 0x9011FFFF: audio
-	 */
-	vdev-nums = <2>;
-	reg = <0x0 0x90100000 0x0 0x20000>;
-	status = "okay";
-};

arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi

@@ -64,6 +64,8 @@ aliases {
 		can0 = &flexcan1;
 		can1 = &flexcan2;
 		can2 = &flexcan3;
+		i2c0 = &i2c_rpbus_0;
+		i2c1 = &i2c_rpbus_1;
 	};
 
 	memory@80000000 {

arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek-ov5640-rpmsg.dts

+#include "fsl-imx8qxp-mek-rpmsg.dts"
+#include "fsl-imx8qxp-mek-ov5640.dtsi"
+
+&i2c_rpbus_5 {
+	ov5640: ov5640@3c {
+		compatible = "ovti,ov5640_v3";
+		reg = <0x3c>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_parallel_csi>;
+		clocks = <&clk IMX8QXP_PARALLEL_CSI_MISC0_CLK>;
+		clock-names = "csi_mclk";
+		pwn-gpios = <&gpio3 2 GPIO_ACTIVE_LOW>;
+		rst-gpios = <&gpio3 3 GPIO_ACTIVE_HIGH>;
+		csi_id = <0>;
+		mclk = <24000000>;
+		mclk_source = <0>;
+		status = "okay";
+		port {
+			ov5640_ep: endpoint {
+				remote-endpoint = <&parallel_csi_ep>;
+			};
+		};
+	};
+};

arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek-ov5640.dts

 #include "fsl-imx8qxp-mek.dts"
-
-&iomuxc {
-	imx8qxp-mek {
-		pinctrl_mipi_csi0: mipicsi0grp{
-			fsl,pins = <
-				SC_P_MIPI_CSI0_MCLK_OUT_MIPI_CSI0_ACM_MCLK_OUT	0xC0000041
-				SC_P_MIPI_CSI0_GPIO0_01_LSIO_GPIO3_IO07		0xC0000041
-				SC_P_MIPI_CSI0_GPIO0_00_LSIO_GPIO3_IO08		0xC0000041
-			>;
-		};
-
-		pinctrl_parallel_csi: parallelcsigrp {
-			fsl,pins = <
-				SC_P_CSI_D00_CI_PI_D02		0xC0000041
-				SC_P_CSI_D01_CI_PI_D03		0xC0000041
-				SC_P_CSI_D02_CI_PI_D04		0xC0000041
-				SC_P_CSI_D03_CI_PI_D05		0xC0000041
-				SC_P_CSI_D04_CI_PI_D06		0xC0000041
-				SC_P_CSI_D05_CI_PI_D07		0xC0000041
-				SC_P_CSI_D06_CI_PI_D08		0xC0000041
-				SC_P_CSI_D07_CI_PI_D09		0xC0000041
-
-				SC_P_CSI_MCLK_CI_PI_MCLK		0xC0000041
-				SC_P_CSI_PCLK_CI_PI_PCLK		0xC0000041
-				SC_P_CSI_HSYNC_CI_PI_HSYNC		0xC0000041
-				SC_P_CSI_VSYNC_CI_PI_VSYNC		0xC0000041
-				SC_P_CSI_EN_LSIO_GPIO3_IO02		0xC0000041
-				SC_P_CSI_RESET_LSIO_GPIO3_IO03	0xC0000041
-			>;
-		};
-	};
-};
-
-&isi_0 {
-	interface = <6 0 2>;	/* INPUT: 6-PARALLEL CSI */
-	parallel_csi;
-	status = "okay";
-};
+#include "fsl-imx8qxp-mek-ov5640.dtsi"
 
 &i2c0_cm40 {
 	ov5640: ov5640@3c {
@@ -59,92 +22,3 @@ ov5640_ep: endpoint {
 		};
 	};
 };
-
-&cameradev {
-	parallel_csi;
-	status = "okay";
-};
-
-&parallel_csi {
-	#address-cells = <1>;
-	#size-cells = <0>;
-	status = "okay";
-	port@0 {
-		reg = <0>;
-		parallel_csi_ep: endpoint {
-			remote-endpoint = <&ov5640_ep>;
-		};
-	};
-};
-
-&isi_2 {
-	interface = <2 0 2>;
-	status = "okay";
-};
-
-&isi_1 {
-	status = "disabled";
-};
-
-&isi_3 {
-	status = "disabled";
-};
-
-&isi_4 {
-	status = "disabled";
-};
-
-&isi_5 {
-	status = "disabled";
-};
-
-&isi_6 {
-	status = "disabled";
-};
-
-&isi_7 {
-	status = "disabled";
-};
-
-&i2c0_csi0 {
-	clock-frequency = <100000>;
-	status = "okay";
-
-	ov5640_mipi: ov5640_mipi@3c {
-		compatible = "ovti,ov5640_mipi_v3";
-		reg = <0x3c>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_mipi_csi0>;
-		clocks = <&clk IMX8QXP_24MHZ>;
-		clock-names = "csi_mclk";
-		csi_id = <0>;
-		pwn-gpios = <&gpio3 7 GPIO_ACTIVE_LOW>;
-		rst-gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
-		mclk = <24000000>;
-		mclk_source = <0>;
-		mipi_csi;
-		status = "okay";
-		port {
-			ov5640_mipi_ep: endpoint {
-				remote-endpoint = <&mipi_csi0_ep>;
-			};
-		};
-	};
-
-	max9286_mipi@6A {
-		status = "disabled";
-	};
-};
-
-&mipi_csi_0 {
-	/delete-property/virtual-channel;
-	status = "okay";
-
-	port@0 {
-		reg = <0>;
-		mipi_csi0_ep: endpoint {
-			remote-endpoint = <&ov5640_mipi_ep>;
-			data-lanes = <1 2>;
-		};
-	};
-};

arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek-ov5640.dtsi

+&iomuxc {
+	imx8qxp-mek {
+		pinctrl_mipi_csi0: mipicsi0grp{
+			fsl,pins = <
+				SC_P_MIPI_CSI0_MCLK_OUT_MIPI_CSI0_ACM_MCLK_OUT	0xC0000041
+				SC_P_MIPI_CSI0_GPIO0_01_LSIO_GPIO3_IO07		0xC0000041
+				SC_P_MIPI_CSI0_GPIO0_00_LSIO_GPIO3_IO08		0xC0000041
+			>;
+		};
+
+		pinctrl_parallel_csi: parallelcsigrp {
+			fsl,pins = <
+				SC_P_CSI_D00_CI_PI_D02		0xC0000041
+				SC_P_CSI_D01_CI_PI_D03		0xC0000041
+				SC_P_CSI_D02_CI_PI_D04		0xC0000041
+				SC_P_CSI_D03_CI_PI_D05		0xC0000041
+				SC_P_CSI_D04_CI_PI_D06		0xC0000041
+				SC_P_CSI_D05_CI_PI_D07		0xC0000041
+				SC_P_CSI_D06_CI_PI_D08		0xC0000041
+				SC_P_CSI_D07_CI_PI_D09		0xC0000041
+
+				SC_P_CSI_MCLK_CI_PI_MCLK		0xC0000041
+				SC_P_CSI_PCLK_CI_PI_PCLK		0xC0000041
+				SC_P_CSI_HSYNC_CI_PI_HSYNC		0xC0000041
+				SC_P_CSI_VSYNC_CI_PI_VSYNC		0xC0000041
+				SC_P_CSI_EN_LSIO_GPIO3_IO02		0xC0000041
+				SC_P_CSI_RESET_LSIO_GPIO3_IO03	0xC0000041
+			>;
+		};
+	};
+};
+
+&isi_0 {
+	interface = <6 0 2>;	/* INPUT: 6-PARALLEL CSI */
+	parallel_csi;
+	status = "okay";
+};
+
+&cameradev {
+	parallel_csi;
+	status = "okay";
+};
+
+&parallel_csi {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+	port@0 {
+		reg = <0>;
+		parallel_csi_ep: endpoint {
+			remote-endpoint = <&ov5640_ep>;
+		};
+	};
+};
+
+&isi_2 {
+	interface = <2 0 2>;
+	status = "okay";
+};
+
+&isi_1 {
+	status = "disabled";
+};
+
+&isi_3 {
+	status = "disabled";
+};
+
+&isi_4 {
+	status = "disabled";
+};
+
+&isi_5 {
+	status = "disabled";
+};
+
+&isi_6 {
+	status = "disabled";
+};
+
+&isi_7 {
+	status = "disabled";
+};
+
+&i2c0_csi0 {
+	clock-frequency = <100000>;
+	status = "okay";
+
+	ov5640_mipi: ov5640_mipi@3c {
+		compatible = "ovti,ov5640_mipi_v3";
+		reg = <0x3c>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_mipi_csi0>;
+		clocks = <&clk IMX8QXP_24MHZ>;
+		clock-names = "csi_mclk";
+		csi_id = <0>;
+		pwn-gpios = <&gpio3 7 GPIO_ACTIVE_LOW>;
+		rst-gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
+		mclk = <24000000>;
+		mclk_source = <0>;
+		mipi_csi;
+		status = "okay";
+		port {
+			ov5640_mipi_ep: endpoint {
+				remote-endpoint = <&mipi_csi0_ep>;
+			};
+		};
+	};
+
+	max9286_mipi@6A {
+		status = "disabled";
+	};
+};
+
+&mipi_csi_0 {
+	/delete-property/virtual-channel;
+	status = "okay";
+
+	port@0 {
+		reg = <0>;
+		mipi_csi0_ep: endpoint {
+			remote-endpoint = <&ov5640_mipi_ep>;
+			data-lanes = <1 2>;
+		};
+	};
+};

arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek-rpmsg.dts

+/*
+ * Copyright 2019 NXP
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/dts-v1/;
+
+#include "fsl-imx8qxp-mek-rpmsg.dtsi"

arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek-m4.dts → arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek-rpmsg.dtsi

 /*
- * Copyright 2018 NXP
+ * Copyright 2019 NXP
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License
@@ -12,88 +12,175 @@
  * GNU General Public License for more details.
  */
 
-#include "fsl-imx8qxp-mek.dts"
+#include "fsl-imx8qxp-mek.dtsi"
 
-/ {
-	sound: sound {
-		status = "disabled";
-	};
+/delete-node/ &i2c0_cm40;
+/delete-node/ &i2c1;
+
+&i2c_rpbus_1 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
 
-	sound-cs42888 {
-		status = "disabled";
+	typec_ptn5110: typec@50 {
+		compatible = "usb,tcpci";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_typec>;
+		reg = <0x50>;
+		interrupt-parent = <&gpio1>;
+		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
+		ss-sel-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&pca9557_a 7 GPIO_ACTIVE_HIGH>;
+		src-pdos = <0x380190c8 0x3803c0c8>;
+		port-type = "drp";
+		sink-disable;
+		default-role = "source";
+		status = "okay";
 	};
+};
+
+&i2c_rpbus_5 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
 
-	rpmsg_i2s: rpmsg-i2s {
-		compatible = "fsl,imx8qxp-rpmsg-i2s";
-		/* the audio device index in m4 domain */
-		fsl,audioindex = <0>;
+	wm8960: wm8960@1a {
+		compatible = "wlf,wm8960";
+		reg = <0x1a>;
 		clocks = <&clk IMX8QXP_AUD_MCLKOUT0>;
 		clock-names = "mclk";
+		wlf,shared-lrclk;
 		power-domains = <&pd_mclk_out0>;
 		assigned-clocks = <&clk IMX8QXP_AUD_PLL0_DIV>,
 				<&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK0_DIV>,
 				<&clk IMX8QXP_AUD_ACM_AUD_REC_CLK0_DIV>,
 				<&clk IMX8QXP_AUD_MCLKOUT0>;
 		assigned-clock-rates = <786432000>, <49152000>, <12288000>, <12288000>;
+	};
+
+	pca6416: gpio@20 {
+		compatible = "ti,tca6416";
+		reg = <0x20>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+
+	cs42888: cs42888@48 {
+		compatible = "cirrus,cs42888";
+		reg = <0x48>;
+		clocks = <&clk IMX8QXP_AUD_MCLKOUT0>;
+		clock-names = "mclk";
 		VA-supply = <&reg_audio>;
 		VD-supply = <&reg_audio>;
 		VLS-supply = <&reg_audio>;
 		VLC-supply = <&reg_audio>;
 		reset-gpio = <&pca9557_b 1 1>;
+		power-domains = <&pd_mclk_out0>;
+		assigned-clocks = <&clk IMX8QXP_AUD_PLL0_DIV>,
+				<&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK0_DIV>,
+				<&clk IMX8QXP_AUD_ACM_AUD_REC_CLK0_DIV>,
+				<&clk IMX8QXP_AUD_MCLKOUT0>;
+		assigned-clock-rates = <786432000>, <49152000>, <12288000>, <12288000>;
 		fsl,txs-rxm;
 		status = "okay";
 	};
 
-	sound_rpmsg_wm8960: sound-rpmsg-wm8960 {
-		compatible = "fsl,imx7d-evk-wm8960",
-			   "fsl,imx-audio-wm8960";
-		model = "wm8960-audio";
-		cpu-dai = <&sai1>;
-		audio-codec = <&rpmsg_i2s>;
-		codec-master;
-		codec-rpmsg;
-		/*
-		 * hp-det = <hp-det-pin hp-det-polarity>;
-		 * hp-det-pin: JD1 JD2  or JD3
-		 * hp-det-polarity = 0: hp detect high for headphone
-		 * hp-det-polarity = 1: hp detect high for speaker
-		 */
-		hp-det = <2 0>;
-		hp-det-gpios = <&gpio1 0 0>;
-		mic-det-gpios = <&gpio1 0 0>;
-		audio-routing =
-			"Headphone Jack", "HP_L",
-			"Headphone Jack", "HP_R",
-			"Ext Spk", "SPK_LP",
-			"Ext Spk", "SPK_LN",
-			"Ext Spk", "SPK_RP",
-			"Ext Spk", "SPK_RN",
-			"LINPUT2", "Mic Jack",
-			"LINPUT3", "Mic Jack",
-			"RINPUT1", "Main MIC",
-			"RINPUT2", "Main MIC",
-			"Mic Jack", "MICB",
-			"Main MIC", "MICB",
-			"CPU-Playback", "ASRC-Playback",
-			"Playback", "CPU-Playback",
-			"ASRC-Capture", "CPU-Capture",
-			"CPU-Capture", "Capture";
+	ov5640: ov5640@3c {
+		compatible = "ovti,ov5640_v3";
+		reg = <0x3c>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_parallel_csi>;
+		clocks = <&clk IMX8QXP_PARALLEL_CSI_MISC0_CLK>;
+		clock-names = "csi_mclk";
+		pwn-gpios = <&gpio3 2 GPIO_ACTIVE_LOW>;
+		rst-gpios = <&gpio3 3 GPIO_ACTIVE_HIGH>;
+		csi_id = <0>;
+		mclk = <24000000>;
+		mclk_source = <0>;
+		status = "okay";
+		port {
+			ov5640_ep: endpoint {
+				remote-endpoint = <&parallel_csi_ep>;
+			};
+		};
 	};
 
-	sound-rpmsg-cs42888 {
-		compatible = "fsl,imx8qm-sabreauto-cs42888",
-				"fsl,imx-audio-cs42888";
-		model = "imx-cs42888";
-		esai-controller = <&esai0>;
-		asrc-controller = <&asrc0>;
-		audio-codec = <&rpmsg_i2s>;
-		codec-rpmsg;
-		status = "okay";
+};
+
+&i2c_rpbus_12 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+
+	max7322: gpio@68 {
+		compatible = "maxim,max7322";
+		reg = <0x68>;
+		gpio-controller;
+		#gpio-cells = <2>;
 	};
 };
 
-&i2c0_cm40 {
-	status = "disabled";
+&i2c_rpbus_14 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+
+	fxos8700@1e {
+		compatible = "fsl,fxos8700";
+		reg = <0x1e>;
+		interrupt-open-drain;
+	};
+
+	fxas2100x@21 {
+		compatible = "fsl,fxas2100x";
+		reg = <0x21>;
+		interrupt-open-drain;
+	};
+
+	mpl3115@60 {
+		compatible = "fsl,mpl3115";
+		reg = <0x60>;
+		interrupt-open-drain;
+	};
+};
+
+&i2c_rpbus_15 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+
+	pca9557_a: gpio@1a {
+		compatible = "nxp,pca9557";
+		reg = <0x1a>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+
+	pca9557_b: gpio@1d {
+		compatible = "nxp,pca9557";
+		reg = <0x1d>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+
+	isl29023@44 {
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_isl29023>;
+		compatible = "fsl,isl29023";
+		reg = <0x44>;
+		rext = <499>;
+		interrupt-parent = <&gpio1>;
+		interrupts = <2 2>;
+	};
+};
+
+&rpmsg{
+	/*
+	 * 64K for one rpmsg instance:
+	 */
+	vdev-nums = <2>;
+	reg = <0x0 0x90000000 0x0 0x20000>;
+	status = "okay";
 };
 
 &intmux_cm40 {
@@ -111,12 +198,3 @@ &flexcan2 {
 &flexspi0 {
 	status = "disabled";
 };
-
-&rpmsg{
-	/*
-	 * 64K for one rpmsg instance:
-	 */
-	vdev-nums = <2>;
-	reg = <0x0 0x90000000 0x0 0x20000>;
-	status = "okay";
-};