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Commit 573a652f authored by Lennert Buytenhek's avatar Lennert Buytenhek Committed by Nicolas Pitre
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ARM: Add Tauros2 L2 cache controller support 


Support for the Tauros2 L2 cache controller as used with the PJ1
and PJ4 CPUs.

Signed-off-by: default avatarLennert Buytenhek <buytenh@marvell.com>
Signed-off-by: default avatarSaeed Bishara <saeed@marvell.com>
Signed-off-by: default avatarNicolas Pitre <nico@marvell.com>
parent edabd38e
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