MLK-20957-2 mmc: cqhci: clear the HALT bit in the first request when resume back

After system suspend, CQE is in cqhci_off state, which set the HALT bit, make
CQE in HALT state. If the SoC do not power down the USDHC module, then when
system resume back, this bit keep the same, still set. So need to clear this
bit when enable CQE for the first request after system resume back. If not,
imx8mm will stuck in the first CMDQ request after system resume back. On
imx8qxp and imx8qm, we do not find this issue because usdhc module lost power
during system suspend/resume, and all the register return to the default reset
value, and the reset value of bit HALT is 0.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>