When an external display device works in data enable(DE) mode,
it usually provides video mode(s) without HSYNC and VSYNC
polarities via display flags.  In this case, the controller(LDB)
and the LVDS PHY still need to align the two signal polarities
with each other respectively.  Otherwise, polarities generated
by default register values may cause mismatch polarities and
display artifacts.  With the DE mode JDI TX26D202VM0BWA panel,
we see vertical lines(very likely, only one) at the left boundary
are missing sometimes, which is caused by this mismatch.  This
patch replaces the default polarity status with explicit active
high in DE mode to fix the issue.

Signed-off-by: Liu Ying <victor.liu@nxp.com>
(cherry picked from commit 69f6ca59)