From e6911ffec71d3da56d2f29ce7d1fa15d1532e12c Mon Sep 17 00:00:00 2001
From: "Guoniu.zhou" <guoniu.zhou@nxp.com>
Date: Tue, 18 May 2021 10:56:21 +0800
Subject: [PATCH] LF-2670-01: arm64: dts: add sensor clock for isp

From ISP doc, it need four type clock. They are core, ahb, axi and
sensor clock. But driver miss sensor clock, so add it.

Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by  : Robby.Cai <robby.cai@nxp.com>
(cherry picked from commit 00b928f6d3752d0d37aecf26a5fbb03b0802a5b0)
---
 arch/arm64/boot/dts/freescale/imx8mp.dtsi | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 37d0099342aa5..531bc9b60d546 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -1543,8 +1543,9 @@ isp_0: isp@32e10000 {
 					interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
 					clocks = <&media_blk_ctrl IMX8MP_CLK_MEDIA_BLK_CTRL_ISP_COR>,
 						 <&media_blk_ctrl IMX8MP_CLK_MEDIA_BLK_CTRL_ISP_AXI>,
-						 <&media_blk_ctrl IMX8MP_CLK_MEDIA_BLK_CTRL_ISP_AHB>;
-					clock-names = "core", "axi", "ahb";
+						 <&media_blk_ctrl IMX8MP_CLK_MEDIA_BLK_CTRL_ISP_AHB>,
+						 <&media_blk_ctrl IMX8MP_CLK_MEDIA_BLK_CTRL_MIPI_CSI_ACLK>;
+					clock-names = "core", "axi", "ahb", "sensor";
 					assigned-clocks = <&clk IMX8MP_CLK_MEDIA_ISP>;
 					assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>;
 					assigned-clock-rates = <500000000>;
@@ -1561,8 +1562,9 @@ isp_1: isp@32e20000 {
 					interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 					clocks = <&media_blk_ctrl IMX8MP_CLK_MEDIA_BLK_CTRL_ISP_COR>,
 						 <&media_blk_ctrl IMX8MP_CLK_MEDIA_BLK_CTRL_ISP_AXI>,
-						 <&media_blk_ctrl IMX8MP_CLK_MEDIA_BLK_CTRL_ISP_AHB>;
-					clock-names = "core", "axi", "ahb";
+						 <&media_blk_ctrl IMX8MP_CLK_MEDIA_BLK_CTRL_ISP_AHB>,
+						 <&media_blk_ctrl IMX8MP_CLK_MEDIA_BLK_CTRL_MIPI_CSI_ACLK>;
+					clock-names = "core", "axi", "ahb", "sensor";
 					assigned-clocks = <&clk IMX8MP_CLK_MEDIA_ISP>;
 					assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>;
 					assigned-clock-rates = <500000000>;
-- 
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