diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
index 4d404d01b97b468d910040925728c6aff0c68488..3a97cb2542fdb60c6d20e041a69728d08097dd6e 100644
--- a/drivers/gpio/gpio-pca953x.c
+++ b/drivers/gpio/gpio-pca953x.c
@@ -684,9 +684,24 @@ static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
 	DECLARE_BITMAP(reg_direction, MAX_LINE);
 	int level;
 
+	bitmap_or(irq_edge_mask, chip->irq_trig_fall, chip->irq_trig_raise, gc->ngpio);
+	bitmap_or(irq_level_mask, chip->irq_trig_level_high, chip->irq_trig_level_low, gc->ngpio);
+
 	if (chip->driver_data & PCA_PCAL) {
+		/*
+		 * The irq_trig_* variables contain the interrupts that are enabled
+		 * in the interrupt controller (= this GPIO-Expander).
+		 * The chip->irq_mask contains the interrupts that are actually active
+		 * at the moment. The latching is only activated for the inputs
+		 * that are interrupt-enabled and active right now. Since we only
+		 * want to enable latching for edge interrupts, we combine the irq_edge_mask
+		 * with the chip->irq_mask and then set the result in the latch registers
+		 * of the GPIO-Expander.
+		 */
+		bitmap_and(irq_mask, irq_edge_mask, chip->irq_mask, gc->ngpio);
+
 		/* Enable latch on interrupt-enabled inputs */
-		pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
+		pca953x_write_regs(chip, PCAL953X_IN_LATCH, irq_mask);
 
 		bitmap_complement(irq_mask, chip->irq_mask, gc->ngpio);
 
@@ -697,8 +712,6 @@ static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
 	/* Switch direction to input if needed */
 	pca953x_read_regs(chip, chip->regs->direction, reg_direction);
 
-	bitmap_or(irq_edge_mask, chip->irq_trig_fall, chip->irq_trig_raise, gc->ngpio);
-	bitmap_or(irq_level_mask, chip->irq_trig_level_high, chip->irq_trig_level_low, gc->ngpio);
 	bitmap_or(irq_mask, irq_edge_mask, irq_level_mask, gc->ngpio);
 
 	bitmap_complement(reg_direction, reg_direction, gc->ngpio);