From a0727c825459eb7afb00c7715d39cee7dbe702af Mon Sep 17 00:00:00 2001
From: Gianfranco Mariotti <gianfranco.mariotti@seco.com>
Date: Thu, 8 Jun 2023 16:33:41 +0200
Subject: [PATCH] [D18] add ECTRL support
---
arch/arm64/boot/dts/seco/seco-imx8mp-d18.dts | 40 ++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/arch/arm64/boot/dts/seco/seco-imx8mp-d18.dts b/arch/arm64/boot/dts/seco/seco-imx8mp-d18.dts
index 22aeae4d8fa34..2d727742dd307 100644
--- a/arch/arm64/boot/dts/seco/seco-imx8mp-d18.dts
+++ b/arch/arm64/boot/dts/seco/seco-imx8mp-d18.dts
@@ -8,6 +8,7 @@
#include <dt-bindings/usb/pd.h>
#include "include/imx8mp.dtsi"
#include "dt-bindings/net/ti-dp83867.h"
+#include "dt-bindings/seco/ectrl_stm32.h"
/ {
model = "SECO i.MX8MPlus LPDDR4 D18 board";
@@ -232,10 +233,46 @@ &i2c1 {
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
+ econtroller: ectrl@40 {
+ compatible = "seco,ectrl-stm32";
+ reg = <0x40>;
+
+ board-id = "D18";
+
+ interrupt-parent = <&gpio4>;
+ interrupts = <2 0>;
+
+ //rb-poff-gpio = "-1";
+
+ ectrl,input;
+
+ events = <ECTRL_EVNT_FAIL_BV
+ ECTRL_EVNT_FAIL_WD
+ ECTRL_EVNT_BATLOW_SIGNAL
+ ECTRL_EVNT_SLEEP_SIGNAL
+ ECTRL_EVNT_LID_SIGNAL
+ ECTRL_EVNT_PWR_BUTTON
+ ECTRL_EVNT_FAIL_PWGIN
+ ECTRL_EVNT_WAKE_EN>;
+
+ boot_device {
+ bootdev@0 {
+ id = <ECTRL_BOOTDEV_EMMC>;
+ label = "on board eMMC";
+ };
+
+ bootdev@1 {
+ id = <ECTRL_BOOTDEV_SPI>;
+ label = "external uSD";
+ };
+ };
+ };
+
pmic: pca9450@25 {
reg = <0x25>;
compatible = "nxp,pca9450c";
/* PMIC PCA9450 PMIC_nINT GPIO1_IO3 */
+ pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pmic>;
interrupt-parent = <&gpio1>;
interrupts = <3 GPIO_ACTIVE_LOW>;
@@ -637,6 +674,9 @@ MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x40000019
/* GPIO expander 0x20 */
MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07 0x40000
+ /* eCtrl */
+ MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02 0x0
+ MX8MP_IOMUXC_GPIO1_IO00__GPIO1_IO00 0x0
/* GPIOs and USB OC */
MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x0 /* USB0_EN_OC#_1V8_IN */
>;
--
GitLab