diff --git a/arch/arm64/boot/dts/seconorth/Makefile b/arch/arm64/boot/dts/seconorth/Makefile
index cad260173107532ec61a31f87a5ee079a7a1068d..985092f1e819eb5ec38a8b615925315e6b8dd53c 100644
--- a/arch/arm64/boot/dts/seconorth/Makefile
+++ b/arch/arm64/boot/dts/seconorth/Makefile
@@ -16,6 +16,7 @@ dtb-y += \
seconorth-tanaro-qp_070wsvgamlli1d.dtb \
seconorth-tanaro-scx1001255ggu06.dts \
seconorth-trizeps8mini-pconxs_v3-atm0700.dtb \
+ seconorth-trizeps8mini-v2r1-pconxs_v3-atm0700l61ct.dts \
seconorth-trizeps8plus-dual-espresso.dtb \
seconorth-trizeps8plus-hdmi-gpu.dtb \
seconorth-trizeps8plus-pconxs_v3-atm0700.dtb \
diff --git a/arch/arm64/boot/dts/seconorth/atm0700l61ct.dtsi b/arch/arm64/boot/dts/seconorth/atm0700l61ct.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..cd67da84d81073a382d32f945669aed766c4a130
--- /dev/null
+++ b/arch/arm64/boot/dts/seconorth/atm0700l61ct.dtsi
@@ -0,0 +1,221 @@
+/*
+ * Copyright 2020 Keith & Koep GmbH
+ *
+ */
+
+/*
+Defines:
+ TOUCH_USE_INT2 Set if alternate touch-interrupt should be used.
+
+ TOUCH_INT Defined in xxx_pinfunc.h. (SODIMM-pin: 45: pConXS)
+ TOUCH_INT2 Defined in xxx_pinfunc.h. (SODIMM-pin: 55: i-PANT7, i-PAN T10)
+ TOUCH_RESET Defined in xxx_pinfunc.h. (SODIMM-pin: 75)
+*/
+
+&iomuxc {
+ pinctrl_captouch: captouchgrp {
+ fsl,pins = <
+ TOUCH_RESET PAD_GPIO /* WAKE */
+#if defined(TOUCH_USE_INT2) && (TOUCH_USE_INT2==1)
+ TOUCH_INT2 PAD_GPIO /* IRQ */
+#else
+ TOUCH_INT PAD_GPIO /* IRQ */
+#endif
+ >;
+ };
+
+ pinctrl_display_enable: display-enable {
+ fsl,pins = < DISPLAY_ENABLE PAD_GPIO_PU >; /* DISPLAY_ENABLE */
+ };
+};
+
+&i2c2 {
+ touch: edt-ft5x06@38 {
+ compatible = "edt,edt-ft5x06", "edt,edt-ft5406";
+ reg = <0x38>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_captouch>;
+ enable_wakeup = "true";
+#if defined(TOUCH_USE_INT2) && (TOUCH_USE_INT2==1)
+ interrupt-parent = <touch_int2_parent>;
+ interrupts = <touch_int2_pin IRQ_TYPE_LEVEL_LOW>;
+#else
+ interrupt-parent = <touch_int_parent>;
+ interrupts = <touch_int_pin IRQ_TYPE_LEVEL_LOW>;
+#endif
+ reset-gpios = <touch_reset GPIO_ACTIVE_HIGH>;
+ touch-threshold = <30>;
+ touch-gain = <3>;
+ touch-offset = <0>;
+ touch-report-rate = <8>;
+ touchscreen-inverted-x;
+ touchscreen-inverted-y;
+ yreverse = "true";
+ xreverse = "true";
+ xres = <1024>;
+ yres = <600>;
+
+ linux,wakeup;
+ };
+/*
+ goodix@5d {
+ compatible = "goodix,gt911";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_captouch>;
+ reg = <0x5d>;
+
+ touchscreen-screwed-x-y;
+ touchscreen-inverted-x;
+ touchscreen-inverted-y;
+#if defined(TOUCH_USE_INT2) && (TOUCH_USE_INT2==1)
+ interrupts-extended = <touch_int2 IRQ_TYPE_LEVEL_HIGH>;
+ irq-gpios = <touch_int2 GPIO_ACTIVE_HIGH>;
+#else
+ interrupts-extended = <touch_int IRQ_TYPE_LEVEL_HIGH>;
+ irq-gpios = <touch_int GPIO_ACTIVE_HIGH>;
+#endif
+ reset-gpios = <touch_reset GPIO_ACTIVE_HIGH>;
+ };
+*/
+};
+
+&i2c3 {
+
+#if 0
+ sn65dsi84@2c {
+ status = "ok";
+ sn65dsi84,addresses = <
+ 0x09 0x0A 0x0B 0x0D 0x10 0x11 0x12
+ 0x18 0x20 0x21 0x24 0x25 0x28 0x29
+ 0x2C 0x2D 0x30 0x31 0x34 0x36 0x38
+ 0x3A 0x3C 0x0D>;
+ sn65dsi84,values = <
+ 0x01 0x03 0x14 0x00 0x20 0x00 0x3D
+ 0x78 0x00 0x04 0x58 0x02 0x20 0x00
+ 0x04 0x00 0x01 0x00 0xA0 0x17 0xA0
+ 0x0C 0x00 0x01>;
+ };
+#endif
+ quicklogic-bx5@64 {
+ status = "ok";
+ };
+};
+
+&mipi_dsi {
+ status = "okay";
+ panel@0 {
+ status = "okay";
+// compatible = "dataimage,scf1001";
+ compatible = "az,atm0700";
+ reg = <0>;
+ pinctrl-0 = <&pinctrl_display_enable>;
+ enable = <display_enable GPIO_ACTIVE_HIGH>;
+ dsi-lanes = <2>;
+ panel-width-mm = <154>;
+ panel-height-mm = <86>;
+
+ display-timings {
+ timing {
+// clock-frequency = <66000000>;
+// hactive = <1024>;
+// vactive = <600>;
+// hfront-porch = <160>;
+// hsync-len = <4>;
+// hback-porch = <160>;
+// vfront-porch = <12>;
+// vsync-len = <1>;
+// vback-porch = <23>;
+ clock-frequency = <66000000>;
+ hactive = <1024>;
+ vactive = <600>;
+ hfront-porch = <160>;
+ hsync-len = <4>;
+ hback-porch = <160>;
+ vfront-porch = <12>;
+ vsync-len = <1>;
+ vback-porch = <23>;
+ };
+ };
+
+ port {
+ panel1_in: endpoint {
+ remote-endpoint = <&mipi_dsi_out>;
+ };
+ };
+ };
+};
+
+/************************************************************************/
+#if defined (__DTS_TRIZEPS8_PINFUNC_H)
+&hdmi {
+ status = "disabled";
+};
+
+&lcdif {
+ status = "disabled";
+};
+
+&dcss {
+ status = "okay";
+
+ clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>,
+ <&clk IMX8MQ_CLK_DISP_AXI_ROOT>,
+ <&clk IMX8MQ_CLK_DISP_RTRM_ROOT>,
+ <&clk IMX8MQ_CLK_DC_PIXEL>,
+ <&clk IMX8MQ_CLK_DISP_DTRC>;
+ clock-names = "apb", "axi", "rtrm", "pix", "dtrc";
+ assigned-clocks = <&clk IMX8MQ_CLK_DC_PIXEL>,
+ <&clk IMX8MQ_VIDEO_PLL1_BYPASS>,
+ <&clk IMX8MQ_VIDEO_PLL1_REF_SEL>,
+ <&clk IMX8MQ_CLK_DISP_AXI>,
+ <&clk IMX8MQ_CLK_DISP_RTRM>;
+ assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>,
+ <&clk IMX8MQ_VIDEO_PLL1>,
+ <&clk IMX8MQ_CLK_27M>,
+ <&clk IMX8MQ_SYS1_PLL_800M>,
+ <&clk IMX8MQ_SYS1_PLL_800M>;
+ assigned-clock-rates = <600000000>, <0>, <0>,
+ <800000000>,
+ <400000000>;
+
+ port@0 {
+ dcss_out: endpoint {
+ remote-endpoint = <&mipi_dsi_in>;
+ };
+ };
+};
+
+&mipi_dsi {
+ fsl,clock-drop-level = <2>;
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ mipi_dsi_in: endpoint {
+ remote-endpoint = <&dcss_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ mipi_dsi_out: endpoint {
+ remote-endpoint = <&panel1_in>;
+ };
+ };
+ };
+};
+#endif
+/************************************************************************/
+#if defined (__DTS_IMX8MM_PINFUNC_H) || defined (__DTS_IMX8MN_PINFUNC_H)
+&mipi_dsi {
+ port@1 {
+ mipi_dsi_out: endpoint {
+ remote-endpoint = <&panel1_in>;
+ };
+ };
+};
+#endif
+/************************************************************************/
+
diff --git a/arch/arm64/boot/dts/seconorth/seconorth-trizeps8mini-v2r2-pconxs_v3-fn1010t007.dts b/arch/arm64/boot/dts/seconorth/seconorth-trizeps8mini-v2r2-pconxs_v3-fn1010t007.dts
new file mode 100644
index 0000000000000000000000000000000000000000..899d30165a7b9f8816aa04213716d85534e90b3d
--- /dev/null
+++ b/arch/arm64/boot/dts/seconorth/seconorth-trizeps8mini-v2r2-pconxs_v3-fn1010t007.dts
@@ -0,0 +1,28 @@
+/*
+ * Copyright 2020 Keith & Koep GmbH
+ *
+ */
+
+/dts-v1/;
+
+// Add defines here, which control behaviour of .dtsi:
+
+#include "trizeps8mini.dtsi"
+#include "pconxs.dtsi"
+#include "atm0700l61ct.dtsi"
+
+/ {
+ model = "Keith & Koep GmbH pConXS V3 ATM0700L61CT i.MX8MM Trizeps8-Mini";
+ compatible = "kk,trizeps8", "kk,trizeps8mini", "fsl,imx8mm-evk", "fsl,imx8mm";
+
+ chosen {
+ stdout-path = &uart1;
+ };
+};
+
+// The ethernet phy is a Realtek RTL8211F
+ðphy0 {
+ compatible = "ethernet-phy-id001c.c916"; // RTL8211F
+ /delete-property/ at803x,eee-disabled;
+ /delete-property/ at803x,vddio-1p8v;
+};
diff --git a/arch/arm64/boot/dts/seconorth/trizeps8mini.dtsi b/arch/arm64/boot/dts/seconorth/trizeps8mini.dtsi
index 7af1beddbb6a7fede79c1f32b900825ac203dadb..ff5e9b3d32cae2f34cd185dcf74a3b80d2812915 100644
--- a/arch/arm64/boot/dts/seconorth/trizeps8mini.dtsi
+++ b/arch/arm64/boot/dts/seconorth/trizeps8mini.dtsi
@@ -7,15 +7,15 @@ Switches:
TRIZEPS8MINI_V1R1 Use V1R1 (engineering sample), whcih use GPIO1_2 as Reset instead of Watchdog-Reset
TRIZEPS8MINI_USDHC1_VQMMC_MCU For UHS: Control VQMMC voltage of internal uSD-Card.
- TRIZEPS8MINI_USDHC2_VQMMC_MCU For UHS: Control VQMMC voltage of external uSD-Card.
- There is only one VQMMC-switch on the Trizeps module.
+ TRIZEPS8MINI_USDHC2_VQMMC_MCU For UHS: Control VQMMC voltage of external uSD-Card.
+ There is only one VQMMC-switch on the Trizeps module.
- Module with eMMC: VQMMC of eMMC fixed to +1V8 and VQMMC of ext. uSD fixed to +3V3
+ Module with eMMC: VQMMC of eMMC fixed to +1V8 and VQMMC of ext. uSD fixed to +3V3
Special mounting exist to switch ext. uSD voltage: Use TRIZEPS8MINI_USDHC2_VQMMC_MCU in that case.
- Module with uSD: VQMMC of int. uSD switchable (+3V3/+1V8) and VQMMC of ext. uSD fixed to +3V3.
+ Module with uSD: VQMMC of int. uSD switchable (+3V3/+1V8) and VQMMC of ext. uSD fixed to +3V3.
May use TRIZEPS8MINI_USDHC1_VQMMC_MCU to allow UHS.
-
+
ETHERNET_ONLY_100MBIT Reduce Ethernet to 100MBit in case extra lanes for 1GBit are not connected on the baseboard.
TRIZEPS8MINI_BT_SCO_XTOR Special audio-driver for Bluetooth.
@@ -165,7 +165,7 @@ sound-xtor {
cpu-dai = <&sai3>;
status = "okay";
};
-#else
+#else
#if 0
bt_sco_codec: bt_sco_codec {
#sound-dai-cells = <0>;
@@ -201,7 +201,7 @@ sound-wm8983 {
simple-audio-card,bitclock-master = <&cpudai>;
simple-audio-card,widgets =
"Headphone", "Headphone Jack",
- "Speaker", "Speaker",
+ "Speaker", "Speaker",
"Line","LineIn Jack",
"Microphone", "Microphone";
simple-audio-card,routing =
@@ -328,14 +328,16 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;
+ // AR8031 ethernet phy, V1RX
ethphy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <4>;
at803x,eee-disabled;
at803x,vddio-1p8v;
#if defined(ETHERNET_ONLY_100MBIT) && (ETHERNET_ONLY_100MBIT==1)
+ max-speed = <100>;
at803x,100MBit;
-#endif
+#endif
};
};
};
@@ -480,7 +482,7 @@ &usdhc1 {
#if defined(TRIZEPS8MINI_USDHC1_VQMMC_MCU) && (TRIZEPS8MINI_USDHC1_VQMMC_MCU==1)
vqmmc-supply = <&mcutouch>;
#else
- no-1-8-v;
+ no-1-8-v;
#endif
status = "okay";
};
@@ -499,16 +501,16 @@ &usdhc2 {
vqmmc-supply = <&mcutouch>;
#else
no-1-8-v;
-#endif
+#endif
status = "okay";
};
&wdog1 {
-#if !defined(TRIZEPS8MINI_V1R1) && (TRIZEPS8MINI_V1R1==0)
+#if !defined(TRIZEPS8MINI_V1R1) && (TRIZEPS8MINI_V1R1==0)
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdog>;
fsl,ext-reset-output;
-#endif
+#endif
status = "okay";
};
@@ -706,7 +708,7 @@ MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
- MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19
+ MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19 // ENET_RESET
>;
};
@@ -911,7 +913,7 @@ pinctrl_wdog: wdoggrp {
fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6
>;
- };
+ };
pinctrl_restouch: restouchgrp {
fsl,pins = < MCU_INT_GPIO PAD_GPIO >; /* MCU Interrupt */