diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 1f171ab0f33ddaa5410b02f31b6b343213f67463..16b4cbaf25e65a12535be66697729ca4cdac7a22 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -15,7 +15,7 @@
 
 / {
 	compatible = "fsl,imx8mp";
-	interrupt-parent = <&gic>;
+	interrupt-parent = <&gpc>;
 	#address-cells = <2>;
 	#size-cells = <2>;
 
@@ -695,6 +695,15 @@ src: src@30390000 {
 				interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
 				#reset-cells = <1>;
 			};
+
+			gpc: gpc@303a0000 {
+				compatible = "fsl,imx8mp-gpc";
+				reg = <0x303a0000 0x10000>;
+				interrupt-parent = <&gic>;
+				interrupt-controller;
+				broken-wake-request-signals;
+				#interrupt-cells = <3>;
+			};
 		};
 
 		aips2: bus@30400000 {
@@ -1541,7 +1550,7 @@ irqsteer_hdmi: irqsteer@32fc2000 {
 				reg = <0x32fc2000 0x1000>;
 				interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
 				interrupt-controller;
-				interrupt-parent = <&gic>;
+				interrupt-parent = <&gpc>;
 				#interrupt-cells = <1>;
 				fsl,channel = <1>;
 				fsl,num-irqs = <64>;
@@ -2092,6 +2101,7 @@ etm0: etm@28440000 {
 		cpu = <&A53_0>;
 		clocks = <&clk IMX8MP_CLK_MAIN_AXI>;
 		clock-names = "apb_pclk";
+		status = "disabled";
 
 		out-ports {
 			port {
@@ -2109,6 +2119,7 @@ etm1: etm@28540000 {
 		cpu = <&A53_1>;
 		clocks = <&clk IMX8MP_CLK_MAIN_AXI>;
 		clock-names = "apb_pclk";
+		status = "disabled";
 
 		out-ports {
 			port {
@@ -2126,6 +2137,7 @@ etm2: etm@28640000 {
 		cpu = <&A53_2>;
 		clocks = <&clk IMX8MP_CLK_MAIN_AXI>;
 		clock-names = "apb_pclk";
+		status = "disabled";
 
 		out-ports {
 			port {
@@ -2143,6 +2155,7 @@ etm3: etm@28740000 {
 		cpu = <&A53_3>;
 		clocks = <&clk IMX8MP_CLK_MAIN_AXI>;
 		clock-names = "apb_pclk";
+		status = "disabled";
 
 		out-ports {
 			port {
@@ -2159,6 +2172,7 @@ funnel0: funnel {
 		* bus.  As such no need to add "arm,primecell".
 		*/
 		compatible = "arm,coresight-static-funnel";
+		status = "disabled";
 
 		in-ports {
 			#address-cells = <1>;
@@ -2208,6 +2222,7 @@ funnel1: funnel@28c03000 {
 		reg = <0x0 0x28c03000 0x0 0x1000>;
 		clocks = <&clk IMX8MP_CLK_MAIN_AXI>;
 		clock-names = "apb_pclk";
+		status = "disabled";
 
 		in-ports {
 			#address-cells = <1>;
@@ -2250,6 +2265,7 @@ etf@28c04000 {
 		reg = <0x0 0x28c04000 0x0 0x1000>;
 		clocks = <&clk IMX8MP_CLK_MAIN_AXI>;
 		clock-names = "apb_pclk";
+		status = "disabled";
 
 		in-ports {
 			port {
@@ -2273,6 +2289,7 @@ etr@28c06000 {
 		reg = <0x0 0x28c06000 0x0 0x1000>;
 		clocks = <&clk IMX8MP_CLK_MAIN_AXI>;
 		clock-names = "apb_pclk";
+		status = "disabled";
 
 		in-ports {
 			port {
diff --git a/drivers/irqchip/irq-imx-gpcv2.c b/drivers/irqchip/irq-imx-gpcv2.c
index 988c08cad87d0ace2ba6fede54b64dd143ffe0b7..16edb2f35a1ec3429642214e45c8c014344b370d 100644
--- a/drivers/irqchip/irq-imx-gpcv2.c
+++ b/drivers/irqchip/irq-imx-gpcv2.c
@@ -332,6 +332,7 @@ static const struct irq_domain_ops gpcv2_irqchip_data_domain_ops = {
 static const struct of_device_id gpcv2_of_match[] = {
 	{ .compatible = "fsl,imx7d-gpc",  .data = (const void *) 2 },
 	{ .compatible = "fsl,imx8mq-gpc", .data = (const void *) 4 },
+	{ .compatible = "fsl,imx8mp-gpc", .data = (const void *) 4 },
 	{ /* END */ }
 };
 
@@ -387,7 +388,8 @@ static int __init imx_gpcv2_irqchip_init(struct device_node *node,
 	}
 	irq_set_default_host(domain);
 
-	if (of_machine_is_compatible("fsl,imx8mq")) {
+	if (of_machine_is_compatible("fsl,imx8mq") ||
+	    of_machine_is_compatible("fsl,imx8mp")) {
 		/* sw workaround for IPI can't wakeup CORE
 		ERRATA(ERR011171) on i.MX8MQ */
 		err11171 = true;
@@ -435,3 +437,4 @@ static int __init imx_gpcv2_irqchip_init(struct device_node *node,
 
 IRQCHIP_DECLARE(imx_gpcv2_imx7d, "fsl,imx7d-gpc", imx_gpcv2_irqchip_init);
 IRQCHIP_DECLARE(imx_gpcv2_imx8mq, "fsl,imx8mq-gpc", imx_gpcv2_irqchip_init);
+IRQCHIP_DECLARE(imx_gpcv2_imx8mp, "fsl,imx8mp-gpc", imx_gpcv2_irqchip_init);