diff --git a/arch/arm64/boot/dts/seconorth/Makefile b/arch/arm64/boot/dts/seconorth/Makefile
index 575be4f8a8995ed9d71cc361745a19ad2ef26acf..7cf8aeba389c52632b101ae8ad23acf23ec1b0bc 100644
--- a/arch/arm64/boot/dts/seconorth/Makefile
+++ b/arch/arm64/boot/dts/seconorth/Makefile
@@ -4,10 +4,11 @@ dtb-y += 	\
 		ethernet-without-gb-phy-overlay.dtbo \
 		pcf8563-overlay.dtbo \
 		rx8803-overlay.dtbo \
+		seconorth-mc3-full.dtb \
 		seconorth-mc3-hdmi-backplane.dtb \
 		seconorth-mc3-headless.dtb \
+		seconorth-mc3-lq057q3dc12_v1r0.dtb \
 		seconorth-mc3-lq057q3dc12.dtb \
-		seconorth-mc3-full.dtb \
 		seconorth-tanaro-atm0700l61ct.dtb \
 		seconorth-tanaro-fg0700w0dsswagl1.dtb \
 		seconorth-tanaro-fn1010t007b.dtb \
diff --git a/arch/arm64/boot/dts/seconorth/mc3_v1r0.dtsi b/arch/arm64/boot/dts/seconorth/mc3_v1r0.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..3cda30852123268e1707e5719da80e4f8be9bb13
--- /dev/null
+++ b/arch/arm64/boot/dts/seconorth/mc3_v1r0.dtsi
@@ -0,0 +1,1260 @@
+/*
+ * Copyright 2022 SECO Nothern Europe GmbH
+ */
+
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/usb/pd.h>
+#include "imx8mp.dtsi"
+
+/ {
+	aliases {
+		rtc0 = &rtc;
+		rtc1 = &snvs_rtc;
+		serial0 = &uart2;
+		serial1 = &uart3;
+		serial2 = &uart4;
+		mmc0 = &usdhc3;
+		mmc1 = &usdhc2;
+		mmc2 = &usdhc1;
+	};
+
+	/*
+	 * The AC97 bus expects a codec clock.
+	 * Since we don't need one, we use this
+	 * dummy instead.
+	 */
+	ac97_dummy_clk: ac97_dummy_clk {
+		compatible = "fixed-clock";
+		clock-frequency = <26000000>;
+		#clock-cells = <0>;
+	};
+
+	csi_dummy_clk: csi_dummy_clk {
+		compatible = "fixed-clock";
+		clock-frequency = <24000000>;
+		#clock-cells = <0>;
+	};
+
+	buzzer: buzzer {
+		compatible = "pwm-beeper";
+		status = "okay";
+		pwms = <&pwm4 0 416666>;
+		beeper-hz = <2400>;
+	};
+
+	chosen {
+		stdout-path = &uart2;
+	};
+
+	memory@40000000 {
+		device_type = "memory";
+		reg = <0x0 0x40000000 0 0x40000000>;
+	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		rpmsg_reserved: rpmsg@0xb8000000 {
+			no-map;
+			reg = <0 0xb8000000 0 0x400000>;
+		};
+	};
+
+	reg_vin_fused: vin_fused {
+		compatible = "regulator-fixed";
+		regulator-name = "VIN_FUSED";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+
+	reg_1v8: 1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "+1V8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-always-on;
+		vin-supply = <&reg_vin_fused>;
+	};
+
+	reg_3v3: 3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "+3V3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+		vin-supply = <&reg_vin_fused>;
+	};
+
+	reg_usbhost_pwr: usbhost-pwr-1 {
+		compatible = "regulator-fixed";
+		regulator-name = "USBHOST_PWR#1";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_usbhost_enable>;
+		gpio = <&gpio2 3 0>;
+		enable-active-high;
+		regulator-always-on;
+		vin-supply = <&reg_vin_fused>;
+	};
+
+	reg_usbhost_pwr_2: usbhost-pwr-2 {
+		compatible = "regulator-fixed";
+		regulator-name = "USBHOST_PWR#2";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		pinctrl-names = "default";
+		gpio = <&gpio2 5 0>;
+		enable-active-high;
+		regulator-always-on;
+		vin-supply = <&reg_vin_fused>;
+	};
+
+	reg_usbhost_pwr_3: usbhost-pwr-3 {
+		compatible = "regulator-fixed";
+		regulator-name = "USBHOST_PWR#3";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		pinctrl-names = "default";
+		gpio = <&gpio2 7 0>;
+		enable-active-high;
+		regulator-always-on;
+		vin-supply = <&reg_vin_fused>;
+	};
+
+	reg_usbc_pwr: usbc-pwr {
+		compatible = "regulator-fixed";
+		regulator-name = "USBC_PWR";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		enable-active-high;
+		regulator-always-on;
+		vin-supply = <&reg_vin_fused>;
+	};
+
+	reg_usdhc2_vmmc: regulator-usdhc2 {
+		compatible = "regulator-fixed";
+		regulator-name = "VMMC_USDHC2";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		enable-active-high;
+	};
+
+	reg_usdhc2_vqmmc: regulator-usdhc2-vqmmc {
+		compatible = "regulator-gpio";
+		regulator-name = "VDDIO_USDHC2";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <3300000>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_sd_vsel>;
+		gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
+		gpios-states = <1>;
+		states = <1800000 1>, <3300000 0>;
+	};
+
+	sound_hdmi: sound-hdmi {
+		compatible = "fsl,imx-audio-hdmi";
+		model = "audio-hdmi";
+		audio-cpu = <&aud2htx>;
+		hdmi-out;
+		constraint-rate = <44100>,
+				<88200>,
+				<176400>,
+				<32000>,
+				<48000>,
+				<96000>,
+				<192000>;
+		status = "okay";
+	};
+
+	usbhub_reset: usbhub-gpio-reset {
+		compatible = "gpio-reset";
+		pinctrl-names = "USBHUB_RST";
+		pinctrl-0 = <&pinctrl_usbhub_reset>;
+		reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
+		reset-delay-us = <10000>;
+		#reset-cells = <0>;
+	};
+
+	/* Enable usb high-speed switch permanently */
+	usbswitch_reset: usbswitch-gpio-reset {
+		compatible = "gpio-reset";
+		reset-gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
+		#reset-cells = <0>;
+	};
+
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		pinctrl-0 = <&pinctrl_backlight_enable>;
+		enable-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>;
+		pwms = <&pwm1 0 1000000000 0>;
+		brightness-levels = <
+			  0  1  2  3  4  5  6  7  8  9
+			 10 11 12 13 14 15 16 17 18 19
+			 20 21 22 23 24 25 26 27 28 29
+			 30 31 32 33 34 35 36 37 38 39
+			 40 41 42 43 44 45 46 47 48 49
+			 50 51 52 53 54 55 56 57 58 59
+			 60 61 62 63 64 65 66 67 68 69
+			 70 71 72 73 74 75 76 77 78 79
+			 80 81 82 83 84 85 86 87 88 89
+			 90 91 92 93 94 95 96 97 98 99
+			100
+		>;
+		default-brightness-level = <100>;
+		status = "disabled";
+	};
+
+	leds: leds {
+		compatible = "gpio-leds";
+		status = "okay";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_leds>;
+
+		status {
+			function = LED_FUNCTION_STATUS;
+			gpios = <&gpio5 1 0>;
+			color = <LED_COLOR_ID_GREEN>;
+			linux,default-trigger = "timer";
+			led-pattern = <200 800>;
+			panic-indicator-off;
+			default-state = "on";
+		};
+
+		error {
+			function = LED_FUNCTION_FAULT;
+			gpios = <&gpio4 21 0>;
+			color = <LED_COLOR_ID_RED>;
+			panic-indicator;
+			default-state = "off";
+		};
+	};
+};
+
+&A53_0 {
+	cpu-supply = <&buck2>;
+};
+
+&A53_1 {
+	cpu-supply = <&buck2>;
+};
+
+&A53_2 {
+	cpu-supply = <&buck2>;
+};
+
+&A53_3 {
+	cpu-supply = <&buck2>;
+};
+
+&ecspi1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>;
+	cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
+	status = "okay";
+
+	spidev0: spi@0 {
+		reg = <0>;
+		compatible = "rohm,dh2228fv";
+		spi-max-frequency = <500000>;
+	};
+};
+
+&eqos {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_eqos>;
+	phy-mode = "rgmii-id";
+	phy-handle = <&ethphy0>;
+	reset-names = "stmmaceth";
+	snps,reset-gpio = <&gpio3 25 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	snps,reset-delays-us = <0 10000 50000>;
+	status = "okay";
+
+	mdio {
+		compatible = "snps,dwmac-mdio";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		ethphy0: ethernet-phy@1 {
+			reg = <1>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+			eee-broken-1000t;
+			eee-broken-100tx;
+		};
+	};
+};
+
+&flexcan1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_flexcan1>;
+	status = "okay";
+};
+
+&flexcan2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_flexcan2>;
+	status = "okay";
+};
+
+/*
+ * Note: To reduce power consumption, it might
+ * be good to disable some of the GPUs/VPUs again
+ * in the future.
+ */
+
+&gpu_2d {
+	status = "okay";
+};
+
+&gpu_3d {
+	status = "okay";
+};
+
+&mix_gpu_ml {
+	status = "okay";
+};
+
+&ml_vipsi {
+	status = "okay";
+};
+
+&vpu_g1 {
+	status = "okay";
+};
+
+&vpu_g2 {
+	status = "okay";
+};
+
+&vpu_vc8000e {
+	status = "okay";
+};
+
+&vpu_v4l2 {
+	status = "okay";
+};
+
+/* HDMI Onboard */
+
+&irqsteer_hdmi {
+	status = "okay";
+};
+
+&hdmi_blk_ctrl {
+	status = "okay";
+};
+
+&hdmi_pavi {
+	status = "okay";
+};
+
+&hdmi {
+	status = "okay";
+};
+
+/*
+ * For some reason, without the hdmiphy the device stalls
+ * during the boot process. Further investigation into why
+ * this happens is required.
+ */
+&hdmiphy {
+	status = "okay";
+};
+
+&lcdif3 {
+	status = "okay";
+
+	/*
+	 * thres-low and thres-high values were taken from
+	 * imx8mp-evk.dtb
+	 */
+	thres-low  = <1 2>;             /* (FIFO * 1 / 2) */
+	thres-high = <3 4>;             /* (FIFO * 3 / 4) */
+};
+
+/* HDMI Audio */
+
+&aud2htx {
+	status = "okay";
+};
+
+&i2c1 {
+	clock-frequency = <400000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c1>;
+	status = "okay";
+
+	pmic: pca9450@25 {
+		reg = <0x25>;
+		compatible = "nxp,pca9450c";
+		i2c-lt-en = "force-enable";
+		status = "okay";
+
+		pinctrl-0 = <&pinctrl_pmic>;
+		interrupt-parent = <&gpio1>;
+		interrupts = <3 GPIO_ACTIVE_LOW>;
+
+		regulators {
+			buck1: BUCK1 {
+				regulator-name = "BUCK1";
+				regulator-min-microvolt = <600000>;
+				regulator-max-microvolt = <2187500>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-ramp-delay = <3125>;
+			};
+
+			buck2: BUCK2 {
+				regulator-name = "BUCK2";
+				regulator-min-microvolt = <600000>;
+				regulator-max-microvolt = <2187500>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-ramp-delay = <3125>;
+				nxp,dvs-run-voltage = <950000>;
+				nxp,dvs-standby-voltage = <850000>;
+			};
+
+			buck4: BUCK4 {
+				regulator-name = "BUCK4";
+				regulator-min-microvolt = <600000>;
+				regulator-max-microvolt = <3400000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			buck5: BUCK5 {
+				regulator-name = "BUCK5";
+				regulator-min-microvolt = <600000>;
+				regulator-max-microvolt = <3400000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			buck6: BUCK6 {
+				regulator-name = "BUCK6";
+				regulator-min-microvolt = <600000>;
+				regulator-max-microvolt = <3400000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo1: LDO1 {
+				regulator-name = "LDO1";
+				regulator-min-microvolt = <1600000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo2: LDO2 {
+				regulator-name = "LDO2";
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <1150000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo3: LDO3 {
+				regulator-name = "LDO3";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo4: LDO4 {
+				regulator-name = "LDO4";
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo5: LDO5 {
+				regulator-name = "LDO5";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+		};
+	};
+
+	ptn5150: ptn5150@1d {
+		compatible = "nxp,ptn5150";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_typec>;
+		reg = <0x1d>;
+		interrupt-parent = <&gpio4>;
+		interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
+		rp = "330uA";
+		mode = "DRP";
+
+		port {
+			typec_dr_sw: endpoint {
+				remote-endpoint = <&usb3_drd_sw>;
+			};
+		};
+	};
+
+	rtc: rtc@32 {
+		compatible = "microcrystal,rv8803";
+		interrupt-parent = <&gpio5>;
+		interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_rtc>;
+		reg = <0x32>;
+	};
+
+	/*
+	 * The ADC chip is detected on the bus but probing
+	 * fails at the moment.
+	 * It seems that the driver tries to send the wrong
+	 * setup and config bytes to the chip. Further
+	 * investigation is required.
+	 */
+	adc: max11601@64 {
+		compatible = "maxim,max11601";
+		reg = <0x64>;
+	};
+
+	temp: lm75b@49 {
+		compatible = "national,lm75b";
+		reg = <0x49>;
+	};
+
+	eeprom: 24c64@50 {
+		compatible = "atmel,24c64";
+		reg = <0x50>;
+		pagesize = <32>;
+	};
+
+	/*
+	 * Taken from imx8mp-evk.dts
+	 *
+	 * CAM_GPIO0 -> CAM_PWDN
+	 * CAM_GPIO1 -> #CAM_RESET
+	 */
+	ov5640_0: ov5640_mipi@3c {
+		compatible = "ovti,ov5640";
+		reg = <0x3c>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_csi0_gpio>;
+		clocks = <&csi_dummy_clk>;
+		clock-names = "xclk";
+		csi_id = <0>;
+		powerdown-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
+		reset-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
+		mipi_csi;
+		status = "okay";
+
+		port {
+			ov5640_mipi_0_ep: endpoint {
+				remote-endpoint = <&mipi_csi0_ep>;
+				data-lanes = <1 2>;
+				clock-lanes = <0>;
+			};
+		};
+	};
+};
+
+&i2c2 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c2>;
+	status = "okay";
+};
+
+&i2c3 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c3>;
+	status = "okay";
+};
+
+&i2c4 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c4>;
+	status = "okay";
+};
+
+&iomuxc {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_hog>;
+
+	pinctrl_hog: hoggrp {
+		fsl,pins = <
+			MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL	0x400001c3
+			MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA	0x400001c3
+			MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD		0x40000019
+			MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC		0x40000019
+		>;
+	};
+
+	pinctrl_buzzer_pwm4: pwm-buzzer {
+		fsl,pins = <MX8MP_IOMUXC_SAI3_MCLK__PWM4_OUT 0x80000000>;
+	};
+
+	pinctrl_csi0_gpio: csi0_gpio_grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13		PAD_GPIO
+			MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14		PAD_GPIO
+		>;
+	};
+
+	pinctrl_ecspi1: ecspi1grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK	0x82
+			MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI	0x82
+			MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO	0x82
+		>;
+	};
+
+	pinctrl_ecspi1_cs: ecspi1cs {
+		fsl,pins = <
+			MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09		PAD_GPIO
+		>;
+	};
+
+	pinctrl_eqos: eqosgrp {
+		fsl,pins = <
+			MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC							0x3
+			MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO						0x3
+			MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0					0x91
+			MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1					0x91
+			MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2					0x91
+			MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3					0x91
+			MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK	0x91
+			MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL				0x91
+			MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0					0x1f
+			MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1					0x1f
+			MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2					0x1f
+			MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3					0x1f
+			MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL				0x1f
+			MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK	0x1f
+
+			MX8MP_IOMUXC_SAI5_MCLK__GPIO3_IO25							0x19
+		>;
+	};
+
+	pinctrl_flexcan1: flexcan1grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_SPDIF_TX__CAN1_TX	0x00000106
+			MX8MP_IOMUXC_SPDIF_RX__CAN1_RX	0x00000106
+			MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28	PAD_GPIO_PD // CAN_SILENTMODE
+			MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29	PAD_GPIO_PD // CAN_TERM_EN
+			MX8MP_IOMUXC_SAI3_RXD__GPIO4_IO30	PAD_GPIO_PU // CAN_RESET#
+		>;
+	};
+
+	pinctrl_flexcan2: flexcan2grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_UART3_RXD__CAN2_TX	0x00000106
+			MX8MP_IOMUXC_UART3_TXD__CAN2_RX	0x00000106
+			MX8MP_IOMUXC_SAI3_TXFS__GPIO4_IO31	PAD_GPIO_PD // CAN2_SILENTMODE
+			MX8MP_IOMUXC_SAI3_TXC__GPIO5_IO00	PAD_GPIO_PD // CAN2_TERM_EN
+			MX8MP_IOMUXC_SAI1_TXD0__GPIO4_IO12	PAD_GPIO_PU // BP_CAN_RESET#
+		>;
+	};
+
+	pinctrl_i2c1: i2c1grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL			0x400001c3
+			MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA			0x400001c3
+		>;
+	};
+
+	pinctrl_i2c2: i2c2grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL			0x400001c3
+			MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA			0x400001c3
+		>;
+	};
+
+	pinctrl_i2c3: i2c3grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL			0x400001c3
+			MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA			0x400001c3
+		>;
+	};
+
+	pinctrl_i2c4: i2c4grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL			0x400001c3
+			MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA			0x400001c3
+		>;
+	};
+
+	pinctrl_pmic: pmicgrp {
+		fsl,pins = <
+			MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03			PAD_GPIO_PU // PMIC_nINT
+		>;
+	};
+
+	pinctrl_rtc: rtcgrp {
+		fsl,pins = <
+			MX8MP_IOMUXC_SPDIF_EXT_CLK__GPIO5_IO05		0x1c4
+		>;
+	};
+
+	pinctrl_typec: typecmuxgrp {
+		fsl,pins = <
+			MX8MP_IOMUXC_SAI1_TXD2__GPIO4_IO14			PAD_GPIO_PU /* USBC_INT */
+			MX8MP_IOMUXC_SAI1_TXD3__GPIO4_IO15			PAD_GPIO_PD /* USBC_PORT: UFP mode */
+			MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02			PAD_GPIO    /* USBC_CON_DET */
+			MX8MP_IOMUXC_SAI1_RXD2__GPIO4_IO04			PAD_GPIO    /* USB1_DFP_UFP */
+			MX8MP_IOMUXC_SAI1_RXD3__GPIO4_IO05			PAD_GPIO_OD /* USB1_SS_SEL */
+			MX8MP_IOMUXC_SAI1_RXFS__GPIO4_IO00			PAD_GPIO /* USB1_SS_EN */
+		>;
+	};
+
+	pinctrl_uart2: uart2grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX		0x140
+			MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX		0x140
+		>;
+	};
+
+	pinctrl_usbhost_enable: usbhost-enable {
+		fsl,pins = <
+			MX8MP_IOMUXC_SD1_DATA1__GPIO2_IO03			PAD_GPIO
+			MX8MP_IOMUXC_SD1_DATA3__GPIO2_IO05			PAD_GPIO
+			MX8MP_IOMUXC_SD1_DATA5__GPIO2_IO07			PAD_GPIO
+		>;
+	};
+
+	pinctrl_usbhost_oc: usbhost-oc {
+		fsl,pins = <
+			MX8MP_IOMUXC_SD1_DATA0__GPIO2_IO02			PAD_GPIO_PU
+			MX8MP_IOMUXC_SD1_DATA2__GPIO2_IO04			PAD_GPIO_PU
+			MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06			PAD_GPIO_PU
+		>;
+	};
+
+	pinctrl_usbhub_reset: usbhub-reset {
+		fsl,pins = <
+			MX8MP_IOMUXC_SAI5_RXD2__GPIO3_IO23			PAD_GPIO_PU
+		>;
+	};
+
+	pinctrl_usbc_oc: usbc-oc {
+		fsl,pins = <
+			MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15			PAD_GPIO_PU
+		>;
+	};
+
+	pinctrl_wdog: wdoggrp {
+		fsl,pins = <
+			MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B		PAD_GPIO_OD
+		>;
+	};
+
+	/* SD-Card */
+
+	pinctrl_usdhc2: usdhc2grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_SD2_CD_B__USDHC2_CD_B		0x190
+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x190
+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x190
+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d0
+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d0
+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d0
+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d0
+		>;
+	};
+
+	pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
+		fsl,pins = <
+			MX8MP_IOMUXC_SD2_CD_B__USDHC2_CD_B		0x194
+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x194
+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x194
+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d4
+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d4
+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d4
+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d4
+		>;
+	};
+
+	pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
+		fsl,pins = <
+			MX8MP_IOMUXC_SD2_CD_B__USDHC2_CD_B		0x196
+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x196
+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x196
+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d6
+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d6
+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d6
+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d6
+		>;
+	};
+
+	pinctrl_sd_vsel: sdvselgrp {
+		fsl,pins = <
+			MX8MP_IOMUXC_GPIO1_IO04__GPIO1_IO04		0x106
+		>;
+	};
+
+	/* eMMC */
+
+	pinctrl_usdhc3: usdhc3grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE		0x190
+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5		0x1d0
+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6		0x1d0
+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7			0x1d0
+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0		0x1d0
+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1		0x1d0
+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2		0x1d0
+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3		0x1d0
+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4		0x1d0
+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK			0x190
+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD			0x1d0
+		>;
+	};
+
+	pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
+		fsl,pins = <
+			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE		0x194
+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5		0x1d4
+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6		0x1d4
+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7			0x1d4
+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0		0x1d4
+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1		0x1d4
+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2		0x1d4
+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3		0x1d4
+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4		0x1d4
+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK			0x194
+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD			0x1d4
+		>;
+	};
+
+	pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
+		fsl,pins = <
+			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE		0x196
+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5		0x1d6
+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6		0x1d6
+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7			0x1d6
+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0		0x1d6
+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1		0x1d6
+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2		0x1d6
+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3		0x1d6
+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4		0x1d6
+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK			0x196
+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD			0x1d6
+		>;
+	};
+
+	/* GPIOs */
+
+	pinctrl_gpio_ttl: gpio_ttl {
+		fsl,pins = <
+			MX8MP_IOMUXC_GPIO1_IO05__GPIO1_IO05		0x40000146 /* TTLOUT1 */
+			MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06		0x40000146 /* TTLOUT2 */
+			MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07		0x40000146 /* TTLOUT3 */
+			MX8MP_IOMUXC_GPIO1_IO08__GPIO1_IO08		0x40000146 /* TTLOUT4 */
+			MX8MP_IOMUXC_GPIO1_IO09__GPIO1_IO09		0x146 /* TTLIN1 */
+			MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10		0x146 /* TTLIN2 */
+			MX8MP_IOMUXC_GPIO1_IO11__GPIO1_IO11		0x146 /* TTLIN3 */
+			MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12		0x146 /* TTLIN4 */
+		>;
+	};
+
+	pinctrl_gpio_sense: gpio_sense {
+		fsl,pins = <
+			MX8MP_IOMUXC_ECSPI2_MISO__GPIO5_IO12	0x6 /* SENSE2 */
+			MX8MP_IOMUXC_ECSPI2_MOSI__GPIO5_IO11	0x6 /* SENSE1 */
+			MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13		0x6 /* SENSE0 */
+		>;
+	};
+
+	/* LCD */
+
+	pinctrl_backlight_pwm1: pwm-backlight {
+		fsl,pins = <
+			MX8MP_IOMUXC_GPIO1_IO01__PWM1_OUT		0x16 /* PWM_BL */
+		>;
+	};
+
+	pinctrl_backlight_enable: backlight-enable {
+		fsl,pins = <
+			MX8MP_IOMUXC_SAI5_RXD3__GPIO3_IO24		0x16 /* BL_ENA */
+		>;
+	};
+
+	pinctrl_lcd_enable: lcd-enable {
+		fsl,pins = <
+			MX8MP_IOMUXC_ECSPI2_SCLK__GPIO5_IO10	0x106 /* LCD_ENA */
+		>;
+	};
+
+	/*
+	 * AC97
+	 *
+	 * Note: The pad configuration for the AC97 is still a draft
+	 * and might not work properly.
+	 */
+
+	pinctrl_ac97_running: ac97-running {
+		fsl,pins = <
+			MX8MP_IOMUXC_SAI1_TXFS__GPIO4_IO10					0x106 /* AC97_RESET */
+			MX8MP_IOMUXC_SAI2_RXD0__AUDIOMIX_SAI2_RX_DATA00		0x106 /* AC97_SDIN */
+			MX8MP_IOMUXC_SAI2_TXC__AUDIOMIX_SAI2_TX_BCLK		0x106 /* AC97_BCLK */
+			MX8MP_IOMUXC_SAI2_TXD0__AUDIOMIX_SAI2_TX_DATA00		0x106 /* AC97_SDOUT */
+			MX8MP_IOMUXC_SAI2_TXFS__AUDIOMIX_SAI2_TX_SYNC		0x106 /* AC97_SYNC */
+			MX8MP_IOMUXC_SAI1_TXC__GPIO4_IO11					0x106 /* AC97_INT */
+		>;
+	};
+
+	pinctrl_ac97_warm_reset: ac97-warm-reset {
+		fsl,pins = <
+			MX8MP_IOMUXC_SAI1_TXFS__GPIO4_IO10					0x106 /* AC97_RESET */
+			MX8MP_IOMUXC_SAI2_RXD0__AUDIOMIX_SAI2_RX_DATA00		0x106 /* AC97_SDIN */
+			MX8MP_IOMUXC_SAI2_TXC__AUDIOMIX_SAI2_TX_BCLK		0x106 /* AC97_BCLK */
+			MX8MP_IOMUXC_SAI2_TXD0__AUDIOMIX_SAI2_TX_DATA00		0x106 /* AC97_SDOUT */
+			MX8MP_IOMUXC_SAI2_TXFS__GPIO4_IO24					0x106 /* AC97_SYNC */
+			MX8MP_IOMUXC_SAI1_TXC__GPIO4_IO11					0x106 /* AC97_INT */
+		>;
+	};
+
+	pinctrl_ac97_reset: ac97-reset {
+		fsl,pins = <
+			MX8MP_IOMUXC_SAI1_TXFS__GPIO4_IO10					0x106 /* AC97_RESET */
+			MX8MP_IOMUXC_SAI2_RXD0__AUDIOMIX_SAI2_RX_DATA00		0x106 /* AC97_SDIN */
+			MX8MP_IOMUXC_SAI2_TXC__AUDIOMIX_SAI2_TX_BCLK		0x106 /* AC97_BCLK */
+			MX8MP_IOMUXC_SAI2_TXD0__GPIO4_IO26					0x106 /* AC97_SDOUT */
+			MX8MP_IOMUXC_SAI2_TXFS__GPIO4_IO24					0x106 /* AC97_SYNC */
+			MX8MP_IOMUXC_SAI1_TXC__GPIO4_IO11					0x106 /* AC97_INT */
+		>;
+	};
+
+	/* LEDs */
+
+	pinctrl_leds: ledsgrp {
+		fsl,pins = <
+			MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01	0x00000106 /* LED_PWR_DISABLE */
+			MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21	0x00000106 /* LED_SOFTWARE_ERROR */
+			MX8MP_IOMUXC_SAI3_TXD__GPIO5_IO01	0x00000106 /* LED_SOFTWARE_OK */
+		>;
+	};
+
+	pinctrl_pcie: pcie {
+		fsl,pins = <
+			MX8MP_IOMUXC_SAI1_TXD1__GPIO4_IO13	PAD_GPIO /* PCIE_PERST# */
+		>;
+	};
+};
+
+/*
+ * PCIe Start
+ *
+ * Taken from imx8mp-evk.dts
+ */
+
+&pcie {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pcie>;
+	disable-gpio = <&gpio2 6 GPIO_ACTIVE_LOW>; /* Removed below */
+	reset-gpio = <&gpio2 7 GPIO_ACTIVE_LOW>; /* Overwritten below */
+	ext_osc = <1>;
+	clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
+			 <&clk IMX8MP_CLK_PCIE_AUX>,
+			 <&clk IMX8MP_CLK_HSIO_AXI>,
+			 <&clk IMX8MP_CLK_PCIE_ROOT>;
+	clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+	assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>,
+					  <&clk IMX8MP_CLK_PCIE_AUX>;
+	assigned-clock-rates = <500000000>, <10000000>;
+	assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>,
+							 <&clk IMX8MP_SYS_PLL2_50M>;
+	l1ss-disabled;
+	status = "okay";
+};
+
+&pcie_ep {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pcie>;
+	ext_osc = <1>;
+	clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
+			 <&clk IMX8MP_CLK_PCIE_AUX>,
+			 <&clk IMX8MP_CLK_HSIO_AXI>,
+			 <&clk IMX8MP_CLK_PCIE_ROOT>;
+	clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+	assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>,
+					  <&clk IMX8MP_CLK_PCIE_AUX>;
+	assigned-clock-rates = <500000000>, <10000000>;
+	assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>,
+							 <&clk IMX8MP_SYS_PLL2_50M>;
+	status = "disabled";
+};
+
+&pcie_phy {
+	ext_osc = <1>;
+	status = "okay";
+};
+
+/*
+ * Taken from imx8mp-ddr4-evk.dts
+ */
+
+&pcie {
+	assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>,
+					  <&clk IMX8MP_CLK_PCIE_AUX>;
+	assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
+							 <&clk IMX8MP_SYS_PLL2_50M>;
+	assigned-clock-rates = <400000000>, <10000000>;
+};
+
+&pcie_ep {
+	assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>,
+					  <&clk IMX8MP_CLK_PCIE_AUX>;
+	assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
+							 <&clk IMX8MP_SYS_PLL2_50M>;
+	assigned-clock-rates = <400000000>, <10000000>;
+};
+
+&pcie {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pcie>;
+	reset-gpio = <&gpio4 13 GPIO_ACTIVE_LOW>;
+	/delete-property/ disable-gpio;
+};
+
+&pcie_phy {
+	status = "okay";
+};
+
+/* PCIe End */
+
+&pwm1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_backlight_pwm1>;
+	status = "okay";
+};
+
+&pwm4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_buzzer_pwm4>;
+	status = "okay";
+};
+
+&uart2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart2>;
+	assigned-clocks = <&clk IMX8MP_CLK_UART2>;
+	assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
+	status = "okay";
+};
+
+&usb3_0 {
+	status = "okay";
+};
+
+&usb_dwc3_0 {
+	dr_mode = "peripheral";
+	hnp-disable;
+	srp-disable;
+	adp-disable;
+	usb-role-switch;
+	role-switch-default-mode = "none";
+	snps,dis-u1-entry-quirk;
+	snps,dis-u2-entry-quirk;
+	status = "okay";
+
+	port {
+		usb3_drd_sw: endpoint {
+			remote-endpoint = <&typec_dr_sw>;
+		};
+	};
+};
+
+&usb3_phy0 {
+	vbus-supply = <&reg_usbc_pwr>;
+	fsl,phy-tx-vref-tune = <0xe>;
+	fsl,phy-tx-preemp-amp-tune = <3>;
+	fsl,phy-tx-vboost-level = <5>;
+	fsl,phy-comp-dis-tune = <7>;
+	fsl,pcs-tx-deemph-3p5db = <0x21>;
+	fsl,phy-pcs-tx-swing-full = <0x7f>;
+	status = "okay";
+};
+
+&usb3_1 {
+	status = "okay";
+};
+
+&usb_dwc3_1 {
+	dr_mode = "host";
+	status = "okay";
+};
+
+&usb3_phy1 {
+	vbus-supply = <&reg_usbhost_pwr>;
+	fsl,phy-tx-preemp-amp-tune = <3>;
+	fsl,phy-tx-vref-tune = <0xb>;
+	status = "okay";
+};
+
+&wdog1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_wdog>;
+	fsl,ext-reset-output;
+	status = "okay";
+};
+
+/* SD-Card */
+&usdhc2 {
+	bus-width = <4>;
+	keep-power-in-suspend;
+	pinctrl-0 = <&pinctrl_usdhc2>;
+	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
+	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	pm-ignore-notify;
+	status = "okay";
+	vmmc-supply = <&reg_usdhc2_vmmc>;
+	vqmmc-supply = <&reg_usdhc2_vqmmc>;
+};
+
+/* eMMC */
+&usdhc3 {
+	assigned-clocks = <&clk IMX8MP_CLK_USDHC3>;
+	assigned-clock-rates = <400000000>;
+	bus-width = <8>;
+	non-removable;
+	pinctrl-0 = <&pinctrl_usdhc3>;
+	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	status = "okay";
+	vmmc-supply = <&reg_3v3>;
+	vqmmc-supply = <&reg_1v8>;
+};
+
+/* AC97 */
+
+&sdma2 {
+	status = "okay";
+};
+
+&sai2 {
+	#sound-dai-cells = <0>;
+	pinctrl-names = "default", "ac97-running", "ac97-reset", "ac97-warm-reset";
+	pinctrl-0 = <&pinctrl_ac97_running>;
+	pinctrl-1 = <&pinctrl_ac97_running>;
+	pinctrl-2 = <&pinctrl_ac97_reset>;
+	pinctrl-3 = <&pinctrl_ac97_warm_reset>;
+	/* GPIOs: ac97-sync, ac97-sdata, ac97-reset */
+	ac97-gpios = <&gpio4 24 0 &gpio4 26 0 &gpio4 10 0>;
+
+	fsl,sai-ac97-mode;
+
+	status = "okay";
+
+	/* AC97 Codecs */
+	codec_wm9705: codec-wm9705 {
+		#sound-dai-cells = <0>;
+		reg = <0>;
+		compatible = "ac97,574d,4c05";
+		status = "okay";
+		clocks = <&ac97_dummy_clk>;
+		clock-names = "ac97_clk";
+
+		interrupt-parent = <&gpio4>;
+		interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
+
+		wm,use-infinite-mode;
+		wm,use-median-filter;
+		wm,use-low-pass-filter;
+	};
+};
+
+/* GPIOs */
+
+&gpio1 {
+	pinctrl-names = "default", "ucbc-oc";
+	pinctrl-0 = <&pinctrl_gpio_ttl>;
+	pinctrl-1 = <&pinctrl_usbc_oc>;
+
+	gpio-line-names =
+			"", "PWM_BL", "", "", "", "TTLOUT1", "TTLOUT2", "TTLOUT3",
+			"TTLOUT4", "TTLIN1", "TTLIN2", "TTLIN3", "TTLIN4", "", "", "USBC_PFAULT",
+			"", "", "", "", "", "", "", "",
+			"", "", "", "", "", "", "", "";
+};
+
+&gpio2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usbhost_oc>;
+
+	gpio-line-names =
+			"", "", "USB1_OC", "USB1_PWR", "USB2_OC", "USB2_PWR", "USB3_OC", "USB3_PWR",
+			"", "", "", "", "", "", "", "",
+			"", "", "", "", "", "", "", "",
+			"BL_ENA", "", "", "", "", "", "", "";
+};
+
+&gpio3 {
+	gpio-line-names =
+			"", "", "", "", "", "", "", "",
+			"", "", "", "", "", "", "", "",
+			"", "", "", "", "", "", "", "",
+			"BL_ENA", "", "", "", "", "", "", "";
+};
+
+&gpio4 {
+	gpio-line-names =
+			"USB1_SS_EN", "LED_PWR_DISABLE", "USBC_CON_DET", "", "USB1_DFP_UFP", "USB1_SS_SEL", "", "",
+			"", "", "AC97_RESET#", "AC97_INT#", "BP_CAN_RESET#", "", "", "USBC_PORT",
+			"", "", "", "", "", "LED_SOFTWARE_ERROR", "AC97_BCLK_2", "AC97_SDIN",
+			"AC97_SYNC", "AC97_BCLK_1", "AC97_SDOUT", "", "CAN_SILENTMODE", "CAN_TERM_EN", "CAN_RESET#", "CAN2_SILENTMODE";
+};
+
+&gpio5 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_gpio_sense>;
+
+	gpio-line-names =
+			"CAN2_TERM_EN", "LED_SOFTWARE_OK", "", "", "", "", "", "",
+			"", "", "LCD_ENA", "SENSE1", "SENSE2", "SENSE0", "", "",
+			"", "", "", "", "", "", "", "",
+			"", "", "", "", "", "", "", "";
+};
+
+&cameradev {
+	status = "okay";
+};
+
+&mipi_csi_0 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+
+	port@0 {
+		reg = <0>;
+		mipi_csi0_ep: endpoint {
+			remote-endpoint = <&ov5640_mipi_0_ep>;
+			data-lanes = <2>;
+			csis-hs-settle = <13>;
+			csis-clk-settle = <2>;
+			csis-wclk;
+		};
+	};
+};
+
+&isp_0 {
+	status = "okay";
+};
+
+&isi_0 {
+	status = "okay";
+
+	cap_device {
+		status = "okay";
+	};
+};
diff --git a/arch/arm64/boot/dts/seconorth/seconorth-mc3-lq057q3dc12_v1r0.dts b/arch/arm64/boot/dts/seconorth/seconorth-mc3-lq057q3dc12_v1r0.dts
new file mode 100644
index 0000000000000000000000000000000000000000..ad11f722d2537eb5af876ec67979f7a417001ea1
--- /dev/null
+++ b/arch/arm64/boot/dts/seconorth/seconorth-mc3-lq057q3dc12_v1r0.dts
@@ -0,0 +1,13 @@
+/*
+ * Copyright 2022 SECO Nothern Europe GmbH
+ */
+
+/dts-v1/;
+
+#include "mc3_v1r0.dtsi"
+#include "lq057q3dc12.dtsi"
+
+/ {
+	model      = "SECO Nothern Europe GmbH - Main Controller 3, i.MX8MP";
+	compatible = "kk,trizeps8", "kk,trizeps8plus", "fsl,imx8mp-evk", "fsl,imx8mp";
+};