diff --git a/arch/arm64/boot/dts/seconorth/fg0700w0dsswagl1.dtsi b/arch/arm64/boot/dts/seconorth/fg0700w0dsswagl1.dtsi
index 71fab8a0aa60d474714e405bb9b88e839bd5e64d..01f530f7dd5741b837802a55b287420369387093 100644
--- a/arch/arm64/boot/dts/seconorth/fg0700w0dsswagl1.dtsi
+++ b/arch/arm64/boot/dts/seconorth/fg0700w0dsswagl1.dtsi
@@ -24,9 +24,6 @@ TOUCH_INT  	PAD_GPIO /* IRQ */
 			>;
 	};
 
-	pinctrl_display_enable: display-enable {
-		fsl,pins = < DISPLAY_ENABLE	PAD_GPIO_PD >; /* DISPLAY_ENABLE */
-	};
 };
 
 &i2c2 {
@@ -48,34 +45,8 @@ eeti@2a {
 	};
 };
 
-&i2c3 {
-	sn65dsi84@2c {
-		compatible = "ti,sn65dsi83";
-		reg = <0x2c>;
+&sn65dsi84 {
 		status = "okay";
-		/* Enable pin is shared with the panel */
-		pinctrl-names = "default";
-		pinctrl-0       = <&pinctrl_display_enable>;
-		enable-gpios    = <display_enable GPIO_ACTIVE_HIGH>;
-
-		ports {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			port@0 {
-				reg = <0>;
-				dsi_bridge_in: endpoint {
-					remote-endpoint = <&mipi_dsi_out>;
-					data-lanes = <1 2 3 4>;
-				};
-			};
-			port@2 {
-				reg = <2>;
-				dsi_bridge_out: endpoint {
-					remote-endpoint = <&panel1_in>;
-				};
-			};
-		};
-	};
 };
 
 / {
@@ -87,6 +58,8 @@ panel_lvds: panel {
 		height-mm = <86>;
 		backlight = <&backlight1>;
 
+		/* Enable pin is shared with the sn65dsi83 */
+
 		panel-timing {
 			clock-frequency = <51206400>;
 			hactive = <1024>;
diff --git a/arch/arm64/boot/dts/seconorth/g121xcett122e.dtsi b/arch/arm64/boot/dts/seconorth/g121xcett122e.dtsi
index 3b43898d2b319bc609a91276e68530dc1a6f5a90..6931b2affbab4bf64143258e9ca8b63b6581046a 100644
--- a/arch/arm64/boot/dts/seconorth/g121xcett122e.dtsi
+++ b/arch/arm64/boot/dts/seconorth/g121xcett122e.dtsi
@@ -24,9 +24,6 @@ TOUCH_INT  	PAD_GPIO /* IRQ */
 			>;
 	};
 
-	pinctrl_display_enable: display-enable {
-		fsl,pins = < DISPLAY_ENABLE	PAD_GPIO_PD >; /* DISPLAY_ENABLE */
-	};
 };
 
 &i2c2 {
@@ -48,34 +45,8 @@ eeti@2a {
 	};
 };
 
-&i2c3 {
-	sn65dsi84@2c {
-		compatible = "ti,sn65dsi83";
-		reg = <0x2c>;
+&sn65dsi84 {
 		status = "okay";
-		/* Enable pin is shared with the panel */
-		pinctrl-names = "default";
-		pinctrl-0       = <&pinctrl_display_enable>;
-		enable-gpios    = <display_enable GPIO_ACTIVE_HIGH>;
-
-		ports {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			port@0 {
-				reg = <0>;
-				dsi_bridge_in: endpoint {
-					remote-endpoint = <&mipi_dsi_out>;
-					data-lanes = <1 2 3 4>;
-				};
-			};
-			port@2 {
-				reg = <2>;
-				dsi_bridge_out: endpoint {
-					remote-endpoint = <&panel1_in>;
-				};
-			};
-		};
-	};
 };
 
 / {
diff --git a/arch/arm64/boot/dts/seconorth/qp_070wsvgamlli1d.dtsi b/arch/arm64/boot/dts/seconorth/qp_070wsvgamlli1d.dtsi
index bd8ff5b258c9d4d2e2455e0e43e31be5c1402fdb..7300aa07255ea22cb0af4635f5796a6517decdad 100644
--- a/arch/arm64/boot/dts/seconorth/qp_070wsvgamlli1d.dtsi
+++ b/arch/arm64/boot/dts/seconorth/qp_070wsvgamlli1d.dtsi
@@ -23,10 +23,6 @@ TOUCH_INT  		PAD_GPIO /* IRQ */
 #endif
 			   	>;
 	};
-		
-	pinctrl_display_enable: display-enable 	{
-		fsl,pins = < DISPLAY_ENABLE		PAD_GPIO_PU >; /* DISPLAY_ENABLE */
-	};
 };
 
 &i2c2 {
@@ -54,34 +50,8 @@ ilitek_i2c: ilitek@41 {
 	};
 };
 
-&i2c3 {
-	sn65dsi84@2c {
-		compatible = "ti,sn65dsi83";
-		reg = <0x2c>;
+&sn65dsi84 {
 		status = "okay";
-		/* Enable pin is shared with the panel */
-		pinctrl-names = "default";
-		pinctrl-0       = <&pinctrl_display_enable>;
-		enable-gpios    = <display_enable GPIO_ACTIVE_HIGH>;
-
-		ports {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			port@0 {
-				reg = <0>;
-				dsi_bridge_in: endpoint {
-					remote-endpoint = <&mipi_dsi_out>;
-					data-lanes = <1 2 3 4>;
-				};
-			};
-			port@2 {
-				reg = <2>;
-				dsi_bridge_out: endpoint {
-					remote-endpoint = <&panel1_in>;
-				};
-			};
-		};
-	};
 };
 
 / {
diff --git a/arch/arm64/boot/dts/seconorth/tanaro-pinfunc.h b/arch/arm64/boot/dts/seconorth/tanaro-pinfunc.h
index 98fcd91c0da28929b4be908b8127b5342ccc74d6..b057d8916253e82359728e1aafa190a01827dc9b 100644
--- a/arch/arm64/boot/dts/seconorth/tanaro-pinfunc.h
+++ b/arch/arm64/boot/dts/seconorth/tanaro-pinfunc.h
@@ -35,11 +35,5 @@
 #define touch_int_pin       4
 #define TOUCH_RESET                                         MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0
 #define touch_reset         &gpio1 0
-#define DISPLAY_ENABLE                                      0x03C 0x2A4 0x000 0x0 0x0
-#define display_enable      &gpio1 5
-#define CAMERA_PWDN                                         0x034 0x29C 0x000 0x0 0x0
-#define camera_pwdn         &gpio1 3
-#define CAMERA_RESET                                        0x040 0x2A8 0x000 0x0 0x0
-#define camera_reset        &gpio1 6
 
 #endif
diff --git a/arch/arm64/boot/dts/seconorth/tanaro.dtsi b/arch/arm64/boot/dts/seconorth/tanaro.dtsi
index 6f7bc6b928fef911077a8b391cf86fb6c9c3e0c3..309edff5f382384115279ebcadd24d309d482dcb 100644
--- a/arch/arm64/boot/dts/seconorth/tanaro.dtsi
+++ b/arch/arm64/boot/dts/seconorth/tanaro.dtsi
@@ -219,6 +219,36 @@ &backlight1 {
 	enable-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
 };
 
+&i2c3 {
+        sn65dsi84: sn65dsi84@2c {
+		compatible = "ti,sn65dsi83";
+		reg = <0x2c>;
+		status = "disabled";
+		/* Enable pin is shared with the panel */
+		pinctrl-names = "default";
+		pinctrl-0       = <&pinctrl_lcd_enable>;
+		enable-gpios    = <&gpio1 5 GPIO_ACTIVE_HIGH>;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			port@0 {
+				reg = <0>;
+				dsi_bridge_in: endpoint {
+					remote-endpoint = <&mipi_dsi_out>;
+					data-lanes = <1 2 3 4>;
+				};
+			};
+			port@2 {
+				reg = <2>;
+				dsi_bridge_out: endpoint {
+					remote-endpoint = <&panel1_in>;
+				};
+			};
+		};
+	};
+};
+
 &A53_0 {
 	cpu-supply = <&buck2_reg>;
 };
@@ -943,6 +973,11 @@ pinctrl_backlight_enable: backlight-enable {
 		fsl,pins = < MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4  0x16 >;	/* BL_EN */
 	};
 
+	pinctrl_lcd_enable: lcd-enable {
+		fsl,pins = < MX8MM_IOMUXC_GPIO1_IO05_GPIO1_IO5  (MX8MM_IOMUXC_PULLDOWN_ENABLE|MX8MM_IOMUXC_HYS|MX8MM_IOMUXC_SLOW|MX8MM_IOMUXC_DRIVE(6))  >;	/* LCD_EN */
+	};
+
+
 	pinctrl_wdog: wdoggrp {
 		fsl,pins = < MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B	0xc6 >;
 	};
diff --git a/drivers/gpu/drm/imx/sec_mipi_dsim-imx.c b/drivers/gpu/drm/imx/sec_mipi_dsim-imx.c
index 2ce5310decbac30793e30bc924e219ed5f3ca7de..75cb44f68c94e45eeb0e7f0a41953c43b0a4f3c3 100644
--- a/drivers/gpu/drm/imx/sec_mipi_dsim-imx.c
+++ b/drivers/gpu/drm/imx/sec_mipi_dsim-imx.c
@@ -458,7 +458,7 @@ static int imx_sec_dsim_probe(struct platform_device *pdev)
 
 	ret = component_add(dev, &imx_sec_dsim_ops);
 	if (ret)
-		goto error1;
+		goto error2;
 
 	return ret;
 error2: