diff --git a/arch/arm64/boot/dts/seco/include/mv.dtsi b/arch/arm64/boot/dts/seco/include/mv.dtsi
index d6bb53c3217f2b9395a84315611db4a9d7d23716..4d1066e32c941112615638597beb7dd8b3a5a5f0 100644
--- a/arch/arm64/boot/dts/seco/include/mv.dtsi
+++ b/arch/arm64/boot/dts/seco/include/mv.dtsi
@@ -121,3 +121,27 @@ rs485_de {
 		output-high;
 	};
 };
+
+&pinctrl_usdhc2_100mhz {
+	fsl,pins = <
+		MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x192
+		MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD	0x1d2
+		MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d2
+		MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d2
+		MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d2
+		MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d2
+		MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT	0xc1
+	>;
+};
+
+&pinctrl_usdhc2_200mhz {
+	fsl,pins = <
+		MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x192
+		MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD	0x1d2
+		MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d2
+		MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d2
+		MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d2
+		MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d2
+		MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT	0xc1
+	>;
+};