From 86c13f7ad7578a73bfdbb6e88668f3e5426abc5f Mon Sep 17 00:00:00 2001
From: Clemens Terasa <clemens.terasa@garz-fricke.com>
Date: Tue, 24 May 2022 17:00:24 +0200
Subject: [PATCH] arm: dts: Fix SANTINO CAN-RS485 power regulator

Add the fixed regulator for the CAN/RS485 output of SANTINO, that may be
optionally galvanic isolated.

With this RS485 Full Duplex mode works well.

BCS 746-000782
---
 .../boot/dts/garzfricke/imx6dl-santino.dtsi    | 18 ++++++++++++++++--
 arch/arm/boot/dts/garzfricke/imx6qdl-san.dtsi  | 18 ++++++++++++------
 2 files changed, 28 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boot/dts/garzfricke/imx6dl-santino.dtsi b/arch/arm/boot/dts/garzfricke/imx6dl-santino.dtsi
index d2786d13b504d..837447aad11c7 100644
--- a/arch/arm/boot/dts/garzfricke/imx6dl-santino.dtsi
+++ b/arch/arm/boot/dts/garzfricke/imx6dl-santino.dtsi
@@ -75,6 +75,19 @@ reg_eth_phy: regulator-eth-phy {
 		regulator-min-microvolt = <3300000>;
 		regulator-max-microvolt = <3300000>;
 	};
+
+	reg_can_rs485_pwr: regulator-can-rs485-pwr {
+		compatible = "regulator-fixed";
+		regulator-name = "can-rs485-pwr";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_can_rs485_pwr_en>;
+		gpio = <&gpio4 5 GPIO_ACTIVE_HIGH>;
+		regulator-always-on;
+		enable-active-high;
+		vin-supply = <&reg_5p0>;
+	};
 };
 
 &backlight {
@@ -85,7 +98,7 @@ &backlight {
 };
 
 &can1 {
-	xceiver-supply = <&reg_5p0>;
+	xceiver-supply = <&reg_can_rs485_pwr>;
 };
 
 &codec {
@@ -226,9 +239,10 @@ &uart1{
 	pinctrl-0 = <&pinctrl_uart1_rxtx &pinctrl_rs485_de>;
 
 	// RS485 Mode
-	rts-gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>; // GPIO to control the transmitter
 	linux,rs485-enabled-at-boot-time;
+	uart-has-rtscts;
 	rs485-rx-during-tx;
+	rts-gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>; // GPIO to control the transmitter
 	status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/garzfricke/imx6qdl-san.dtsi b/arch/arm/boot/dts/garzfricke/imx6qdl-san.dtsi
index 6b3ba4e6132fd..4cf8bec605621 100644
--- a/arch/arm/boot/dts/garzfricke/imx6qdl-san.dtsi
+++ b/arch/arm/boot/dts/garzfricke/imx6qdl-san.dtsi
@@ -450,6 +450,12 @@ MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28	0x80000000
 			>;
 		};
 
+		pinctrl_can_rs485_pwr_en: can_rs485_pwr_en_grp {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_19__GPIO4_IO05		0x80000000
+			>;
+		};
+
 		/* Used by SANTOKA and SANTARO */
 		pinctrl_ctouch_int1: ctouch_intgrp1 {
 			fsl,pins = <
@@ -707,6 +713,12 @@ MX6QDL_PAD_SD1_DAT3__PWM1_OUT		0x80000000
 			>;
 		};
 
+		pinctrl_rs485_de: rs485degrp {
+			fsl,pins = <
+				MX6QDL_PAD_SD3_RST__GPIO7_IO08		0x80000000
+			>;
+		};
+
 		/* Used by SANTINO[-LT], SANTVEND and SANVITO */
 		pinctrl_rtc1: rtc-grp1 {
 			fsl,pins = <
@@ -747,12 +759,6 @@ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1
 			>;
 		};
 
-		pinctrl_rs485_de: rs485degrp {
-			fsl,pins = <
-				MX6QDL_PAD_SD3_RST__GPIO7_IO08		0x80000000
-			>;
-		};
-
 		/* Used by SANTOKA, SANTINO and SANVITO */
 		pinctrl_uart2_rcts1: uart2rctsgrp1 {
 			fsl,pins = <
-- 
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