diff --git a/arch/arm64/boot/dts/seco/Makefile b/arch/arm64/boot/dts/seco/Makefile
index 85aff54219a48dcc3d8839b0c0e2eb3dcc3b0f8f..b408fd6de4001eef97ac961b10a00648aa3b9be5 100644
--- a/arch/arm64/boot/dts/seco/Makefile
+++ b/arch/arm64/boot/dts/seco/Makefile
@@ -3,12 +3,14 @@ ifeq ($(CONFIG_CPU_RK3399),y)
endif
dtb-$(CONFIG_ARCH_ROCKCHIP) += seco-rk3399-c31.dtb
-dtb-$(CONFIG_ARCH_ROCKCHIP) += seco-px30-d23-revc-hdmi.dtb
-dtb-$(CONFIG_ARCH_ROCKCHIP) += seco-px30-d23-revc-lvds-800x480.dtb
-dtb-$(CONFIG_ARCH_ROCKCHIP) += seco-px30-d23-revc-lvds-1024x600.dtb
-dtb-$(CONFIG_ARCH_ROCKCHIP) += seco-px30-d23-revc-lvds-1280x800.dtb
-dtb-$(CONFIG_ARCH_ROCKCHIP) += seco-px30-d23-revc-hdmi-lvds.dtb
-dtb-$(CONFIG_ARCH_ROCKCHIP) += seco-px30-d23-revc-hdmi-lvds-1280x800.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += seco-px30-d23-revc.dtb
+
+# dtb-$(CONFIG_ARCH_ROCKCHIP) += seco-px30-d23-revc-hdmi.dtb
+# dtb-$(CONFIG_ARCH_ROCKCHIP) += seco-px30-d23-revc-lvds-800x480.dtb
+# dtb-$(CONFIG_ARCH_ROCKCHIP) += seco-px30-d23-revc-lvds-1024x600.dtb
+# dtb-$(CONFIG_ARCH_ROCKCHIP) += seco-px30-d23-revc-lvds-1280x800.dtb
+# dtb-$(CONFIG_ARCH_ROCKCHIP) += seco-px30-d23-revc-hdmi-lvds.dtb
+# dtb-$(CONFIG_ARCH_ROCKCHIP) += seco-px30-d23-revc-hdmi-lvds-1280x800.dtb
dts-dirs += overlays
diff --git a/arch/arm64/boot/dts/seco/overlays/Makefile b/arch/arm64/boot/dts/seco/overlays/Makefile
index 3ac78d4ce6ffa34148feae24d22c9207248bce37..7e95dce52976949a194e1082001b1aba86091bce 100644
--- a/arch/arm64/boot/dts/seco/overlays/Makefile
+++ b/arch/arm64/boot/dts/seco/overlays/Makefile
@@ -6,6 +6,10 @@ dtbo-$(CONFIG_CPU_RK3399) += seco-rk3399-c31-hdmi.dtbo \
seco-rk3399-c31-can2.dtbo\
seco-rk3399-c31-spi-eeprom.dtbo\
seco-rk3399-c31-spi-rtc.dtbo
+dtbo-$(CONFIG_CPU_PX30) += seco-px30-d23-hdmi.dtbo \
+ seco-px30-d23-lvds1280x800.dtbo \
+ seco-px30-d23-lvds800x480.dtbo \
+ seco-px30-d23-lvds-hdmi.dtbo
targets += dtbs dtbs_install
targets += $(dtbo-y)
diff --git a/arch/arm64/boot/dts/seco/overlays/seco-px30-d23-hdmi-overlay.dts b/arch/arm64/boot/dts/seco/overlays/seco-px30-d23-hdmi-overlay.dts
new file mode 100644
index 0000000000000000000000000000000000000000..747308be99aa4c6386535be0ace19308d425d87a
--- /dev/null
+++ b/arch/arm64/boot/dts/seco/overlays/seco-px30-d23-hdmi-overlay.dts
@@ -0,0 +1,132 @@
+/*
+ * Copyright 2020 SECO
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/display/media-bus-format.h>
+
+/ {
+ model = "Seco D23 PX30 - HDMI video output";
+ compatible = "rockchip,seco-px30-d23", "rockchip,px30", "rockchip,linux", "rockchip,rk3326";
+
+/* __________________________________________________________________________
+ * | |
+ * | HDMI |
+ * |__________________________________________________________________________|
+ */
+
+ fragment@0 {
+ target-path = "/";
+ __overlay__ {
+ chosen {
+ bootargs = "swiotlb=1 console=ttyFIQ0 rw rootwait board_revC-HDMI";
+ };
+
+ panel_rgb {
+ compatible = "simple-panel";
+ enable-delay-ms = <120>;
+ prepare-delay-ms = <20>;
+ unprepare-delay-ms = <20>;
+ disable-delay-ms = <20>;
+ bus-format = <MEDIA_BUS_FMT_RGB888_1X7X4_SPWG>;
+
+ width-mm = <154>;
+ height-mm = <86>;
+
+ display-timings {
+ native-mode = <&timing0>;
+
+ timing0: timing0 {
+ clock-frequency = <148500000>;
+ hactive = <1920>;
+ vactive = <1080>;
+ hback-porch = <80>;
+ hfront-porch = <80>;
+ vback-porch = <18>;
+ vfront-porch = <20>;
+ hsync-len = <80>;
+ vsync-len = <7>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ de-active = <0>;
+ pixelclk-active = <0>;
+ };
+ };
+
+ port {
+ panel_in_rgb: endpoint {
+ remote-endpoint = <&rgb_out_panel>;
+ };
+ };
+ };
+ };
+ };
+
+ fragment@1 {
+ target = <&rgb>;
+ __overlay__ {
+ status = "okay";
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@1 {
+ reg = <1>;
+ rgb_out_panel: endpoint {
+ remote-endpoint = <&panel_in_rgb>;
+ };
+ };
+ };
+ };
+ };
+
+ fragment@2 {
+ target = <&i2c1>;
+ __overlay__ {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ tda19988: tda19988@70 {
+ compatible = "udoo,tda19988";
+ reg = <0x70>;
+ video-ports = <0x234501>;
+ status = "okay";
+ };
+ };
+ };
+
+ fragment@3 {
+ target = <&rgb_in_vopl>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@4 {
+ target = <&vopl>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@5 {
+ target = <&route_rgb>;
+ __overlay__ {
+ connect = <&vopl_out_rgb>;
+ status = "okay";
+ };
+ };
+};
+
diff --git a/arch/arm64/boot/dts/seco/overlays/seco-px30-d23-lvds-hdmi-overlay.dts b/arch/arm64/boot/dts/seco/overlays/seco-px30-d23-lvds-hdmi-overlay.dts
new file mode 100644
index 0000000000000000000000000000000000000000..86f0b5d75f549d44bdfc8d5d213d73c8329b5225
--- /dev/null
+++ b/arch/arm64/boot/dts/seco/overlays/seco-px30-d23-lvds-hdmi-overlay.dts
@@ -0,0 +1,198 @@
+/*
+ * Copyright 2020 SECO
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/clock/px30-cru.h>
+#include <dt-bindings/display/media-bus-format.h>
+
+/ {
+ model = "Seco D23 PX30 - LVDS+HDMI video output";
+ compatible = "rockchip,seco-px30-d23", "rockchip,px30", "rockchip,linux", "rockchip,rk3326";
+
+/* __________________________________________________________________________
+ * | |
+ * | LVDS+HDMI |
+ * |__________________________________________________________________________|
+ */
+
+ fragment@0 {
+ target-path = "/";
+ __overlay__ {
+ chosen {
+ bootargs = "swiotlb=1 console=ttyFIQ0 rw rootwait board_revC-LVDSHDMI";
+ };
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm1 0 1000000 0>;
+ };
+
+ panel_lvds {
+ bus-format = <MEDIA_BUS_FMT_RGB888_1X7X4_SPWG>;
+
+ display-timings {
+ native-mode = <&timing0>;
+
+ timing0: timing0 {
+ clock-frequency = <66100000>;
+ hactive = <1280>;
+ vactive = <800>;
+ hback-porch = <35>;
+ hfront-porch = <35>;
+ vback-porch = <4>;
+ vfront-porch = <4>;
+ hsync-len = <10>;
+ vsync-len = <2>;
+ de-active = <0>;
+ pixelclk-active = <0>;
+ };
+ };
+ };
+
+ panel_rgb {
+ compatible = "simple-panel";
+ enable-delay-ms = <120>;
+ prepare-delay-ms = <20>;
+ unprepare-delay-ms = <20>;
+ disable-delay-ms = <20>;
+ bus-format = <MEDIA_BUS_FMT_RGB888_1X7X4_SPWG>;
+
+ width-mm = <154>;
+ height-mm = <86>;
+
+ display-timings {
+ native-mode = <&timing1>;
+
+ timing1: timing1 {
+ clock-frequency = <148500000>;
+ hactive = <1920>;
+ vactive = <1080>;
+ hback-porch = <80>;
+ hfront-porch = <80>;
+ vback-porch = <18>;
+ vfront-porch = <20>;
+ hsync-len = <80>;
+ vsync-len = <7>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ de-active = <0>;
+ pixelclk-active = <0>;
+ };
+ };
+
+ port {
+ panel_in_rgb: endpoint {
+ remote-endpoint = <&rgb_out_panel>;
+ };
+ };
+ };
+ };
+ };
+
+ fragment@1 {
+ target = <&rgb>;
+ __overlay__ {
+ status = "okay";
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@1 {
+ reg = <1>;
+ rgb_out_panel: endpoint {
+ remote-endpoint = <&panel_in_rgb>;
+ };
+ };
+ };
+ };
+ };
+
+ fragment@2 {
+ target = <&i2c1>;
+ __overlay__ {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ tda19988: tda19988@70 {
+ compatible = "udoo,tda19988";
+ reg = <0x70>;
+ video-ports = <0x234501>;
+ status = "okay";
+ };
+ };
+ };
+
+ fragment@3 {
+ target = <&rgb_in_vopl>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@4 {
+ target = <&vopl>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@5 {
+ target = <&route_rgb>;
+ __overlay__ {
+ connect = <&vopl_out_rgb>;
+ status = "okay";
+ };
+ };
+
+ fragment@6 {
+ target = <&lvds>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@7 {
+ target = <&lvds_in_vopb>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@8 {
+ target = <&vopl>;
+ __overlay__ {
+ status = "okay";
+ assigned-clocks = <&cru PLL_NPLL>;
+ assigned-clock-rates = <1188000000>;
+ };
+ };
+
+ fragment@9 {
+ target = <&video_phy>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@10 {
+ target = <&route_lvds>;
+ __overlay__ {
+ connect = <&vopl_out_lvds>;
+ status = "okay";
+ };
+ };
+};
+
diff --git a/arch/arm64/boot/dts/seco/overlays/seco-px30-d23-lvds1280x800-overlay.dts b/arch/arm64/boot/dts/seco/overlays/seco-px30-d23-lvds1280x800-overlay.dts
new file mode 100644
index 0000000000000000000000000000000000000000..47596bdcfa683d78c2117d861d70e7fc19bf6ae9
--- /dev/null
+++ b/arch/arm64/boot/dts/seco/overlays/seco-px30-d23-lvds1280x800-overlay.dts
@@ -0,0 +1,104 @@
+/*
+ * Copyright 2020 SECO
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/clock/px30-cru.h>
+#include <dt-bindings/display/media-bus-format.h>
+
+/ {
+ model = "Seco D23 PX30 - LVDS 1280x800 video output";
+ compatible = "rockchip,seco-px30-d23", "rockchip,px30", "rockchip,linux", "rockchip,rk3326";
+
+/* __________________________________________________________________________
+ * | |
+ * | LVDS |
+ * |__________________________________________________________________________|
+ */
+
+ fragment@0 {
+ target-path = "/";
+ __overlay__ {
+ chosen {
+ bootargs = "swiotlb=1 console=ttyFIQ0 rw rootwait board_revC-LVDS1280";
+ };
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm1 0 1000000 0>;
+ };
+
+ panel_lvds {
+ bus-format = <MEDIA_BUS_FMT_RGB888_1X7X4_SPWG>;
+ display-timings {
+ native-mode = <&timing0>;
+
+ timing0: timing0 {
+ clock-frequency = <66100000>;
+ hactive = <1280>;
+ vactive = <800>;
+ hback-porch = <35>;
+ hfront-porch = <35>;
+ vback-porch = <4>;
+ vfront-porch = <4>;
+ hsync-len = <10>;
+ vsync-len = <2>;
+ de-active = <0>;
+ pixelclk-active = <0>;
+ };
+ };
+ };
+ };
+ };
+
+ fragment@1 {
+ target = <&lvds>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@2 {
+ target = <&lvds_in_vopb>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@3 {
+ target = <&vopl>;
+ __overlay__ {
+ status = "okay";
+ assigned-clocks = <&cru PLL_NPLL>;
+ assigned-clock-rates = <1188000000>;
+ };
+ };
+
+ fragment@4 {
+ target = <&video_phy>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@5 {
+ target = <&route_lvds>;
+ __overlay__ {
+ connect = <&vopl_out_lvds>;
+ status = "okay";
+ };
+ };
+};
+
diff --git a/arch/arm64/boot/dts/seco/overlays/seco-px30-d23-lvds800x480-overlay.dts b/arch/arm64/boot/dts/seco/overlays/seco-px30-d23-lvds800x480-overlay.dts
new file mode 100644
index 0000000000000000000000000000000000000000..72b7140f9815c8f27e9cae5cc2fe86f15053419a
--- /dev/null
+++ b/arch/arm64/boot/dts/seco/overlays/seco-px30-d23-lvds800x480-overlay.dts
@@ -0,0 +1,106 @@
+/*
+ * Copyright 2020 SECO
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/clock/px30-cru.h>
+#include <dt-bindings/display/media-bus-format.h>
+
+/ {
+ model = "Seco D23 PX30 - LVDS 800x480 video output";
+ compatible = "rockchip,seco-px30-d23", "rockchip,px30", "rockchip,linux", "rockchip,rk3326";
+
+/* __________________________________________________________________________
+ * | |
+ * | LVDS |
+ * |__________________________________________________________________________|
+ */
+
+ fragment@0 {
+ target-path = "/";
+ __overlay__ {
+ chosen {
+ bootargs = "swiotlb=1 console=ttyFIQ0 rw rootwait board_revC-LVDS800";
+ };
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm1 0 1000000 0>;
+ };
+
+ panel_lvds {
+ bus-format = <MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA>;
+ display-timings {
+ native-mode = <&timing0>;
+
+ timing0: timing0 {
+ clock-frequency = <33000000>;
+ hactive = <800>;
+ vactive = <480>;
+ hback-porch = <30>;
+ hfront-porch = <30>;
+ vback-porch = <10>;
+ vfront-porch = <10>;
+ hsync-len = <30>;
+ vsync-len = <10>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ de-active = <0>;
+ pixelclk-active = <0>;
+ };
+ };
+ };
+ };
+ };
+
+ fragment@1 {
+ target = <&lvds>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@2 {
+ target = <&lvds_in_vopb>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@3 {
+ target = <&vopl>;
+ __overlay__ {
+ status = "okay";
+ assigned-clocks = <&cru PLL_NPLL>;
+ assigned-clock-rates = <1188000000>;
+ };
+ };
+
+ fragment@4 {
+ target = <&video_phy>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@5 {
+ target = <&route_lvds>;
+ __overlay__ {
+ connect = <&vopl_out_lvds>;
+ status = "okay";
+ };
+ };
+};
+
diff --git a/arch/arm64/boot/dts/seco/seco-px30-d23-revc.dts b/arch/arm64/boot/dts/seco/seco-px30-d23-revc.dts
new file mode 100644
index 0000000000000000000000000000000000000000..059cf9c2de92703549a60e69b7b6e5dc4056c102
--- /dev/null
+++ b/arch/arm64/boot/dts/seco/seco-px30-d23-revc.dts
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+/dts-v1/;
+
+#include "seco-px30-d23-revc.dtsi"
+
diff --git a/arch/arm64/boot/dts/seco/seco-px30-d23-revc.dtsi b/arch/arm64/boot/dts/seco/seco-px30-d23-revc.dtsi
index 39b3d112838b21385ad5e2b376c392387722b6ed..29e9ac80d6fc71e944eb7754f1ba56af58450908 100644
--- a/arch/arm64/boot/dts/seco/seco-px30-d23-revc.dtsi
+++ b/arch/arm64/boot/dts/seco/seco-px30-d23-revc.dtsi
@@ -12,6 +12,8 @@
#include "seco-px30.dtsi"
/ {
+ compatible = "rockchip,linux", "rockchip,rk3326";
+
aliases {
mmc0 = &emmc;
mmc1 = &sdmmc;
@@ -141,16 +143,16 @@
gpio = <&gpio_expanderA_u32 5 GPIO_ACTIVE_LOW>;
};
-// pcie_rst: pcie_rst {
-// compatible = "regulator-fixed";
-// regulator-boot-on;
-// regulator-always-on;
-// regulator-name = "pcie_rst";
-// regulator-min-microvolt = <3000000>;
-// regulator-max-microvolt = <3000000>;
-// gpio = <&gpio_expanderA_u32 13 GPIO_ACTIVE_LOW>;
-// };
-//
+ pcie_rst: pcie_rst {
+ compatible = "regulator-fixed";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-name = "pcie_rst";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ gpio = <&gpio_expanderA_u32 13 GPIO_ACTIVE_HIGH>;
+ };
+
vdd_m2_enabler: en_vdd-m2 {
compatible = "reg-userspace-consumer";
regulator-name = "en_vdd-m2";
@@ -210,6 +212,66 @@
sound-dai = <&rk809_codec>;
};
};
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm1 0 1000000 0>;
+ brightness-levels = <
+ 0 1 2 3 4 5 6 7
+ 8 9 10 11 12 13 14 15
+ 16 17 18 19 20 21 22 23
+ 24 25 26 27 28 29 30 31
+ 32 33 34 35 36 37 38 39
+ 40 41 42 43 44 45 46 47
+ 48 49 50 51 52 53 54 55
+ 56 57 58 59 60 61 62 63
+ 64 65 66 67 68 69 70 71
+ 72 73 74 75 76 77 78 79
+ 80 81 82 83 84 85 86 87
+ 88 89 90 91 92 93 94 95
+ 96 97 98 99 100 101 102 103
+ 104 105 106 107 108 109 110 111
+ 112 113 114 115 116 117 118 119
+ 120 121 122 123 124 125 126 127
+ 128 129 130 131 132 133 134 135
+ 136 137 138 139 140 141 142 143
+ 144 145 146 147 148 149 150 151
+ 152 153 154 155 156 157 158 159
+ 160 161 162 163 164 165 166 167
+ 168 169 170 171 172 173 174 175
+ 176 177 178 179 180 181 182 183
+ 184 185 186 187 188 189 190 191
+ 192 193 194 195 196 197 198 199
+ 200 201 202 203 204 205 206 207
+ 208 209 210 211 212 213 214 215
+ 216 217 218 219 220 221 222 223
+ 224 225 226 227 228 229 230 231
+ 232 233 234 235 236 237 238 239
+ 240 241 242 243 244 245 246 247
+ 248 249 250 251 252 253 254 255>;
+ default-brightness-level = <250>;
+ enable-gpio = <&gpio_expanderB_u33 10 GPIO_ACTIVE_HIGH>;
+ };
+
+ panel_lvds {
+ compatible = "samsung,lsl070nl01", "simple-panel";
+ backlight = <&backlight>;
+ power-supply = <&vcc3v3_lcd>;
+ enable-delay-ms = <20>;
+ prepare-delay-ms = <20>;
+ unprepare-delay-ms = <20>;
+ disable-delay-ms = <20>;
+ enable-gpios = <&gpio_expanderA_u32 12 GPIO_ACTIVE_HIGH>;
+
+ width-mm = <217>;
+ height-mm = <136>;
+
+ port {
+ panel_in_lvds: endpoint {
+ remote-endpoint = <&lvds_out_panel>;
+ };
+ };
+ };
};
&bus_apll {
@@ -281,6 +343,16 @@
&lvds {
status = "disabled";
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@1 {
+ reg = <1>;
+ lvds_out_panel: endpoint {
+ remote-endpoint = <&panel_in_lvds>;
+ };
+ };
+ };
};
&rgb {
@@ -724,6 +796,8 @@
/*cd-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>; [> CD GPIO <]*/
sd-uhs-sdr12;
sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
vqmmc-supply = <&vccio_sd>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
@@ -907,6 +981,13 @@
<1 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>, /* +3V3_MOD_EN - GPIO_40 */
<1 RK_PB3 RK_FUNC_GPIO &pcfg_output_high>, /* HDMI_INT# - GPIO_43 */
+
+// <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>, /* GPIO 81 */
+// <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>,
+// <2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_up>,
+// <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>,
+// <2 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>,
+//
<0 RK_PC4 RK_FUNC_1 &pcfg_output_high>; /* CLKOUT_32K */
};
};