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Commit 6ac32ade authored by Nicola Sparnacci's avatar Nicola Sparnacci
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[SANTINO] Remove unused files

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board/seco/imx6dl_santino/mx6dlsabresd.cfg deleted 100644 → 0
+ 0
− 150
View file @ 9de3fb7e
/*
* Copyright (C) 2014-2016 Freescale Semiconductor, Inc.
* Copyright 2017 NXP
*
* SPDX-License-Identifier: GPL-2.0+
*
* Refer doc/README.imximage for more details about how-to configure
* and create imximage boot image
*
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */
IMAGE_VERSION 2
/*
* Boot Device : one of
* spi, sd (the board has no nand neither onenand)
*/
BOOT_FROM sd
#ifdef CONFIG_USE_IMXIMG_PLUGIN
/*PLUGIN plugin-binary-file IRAM_FREE_START_ADDR*/
PLUGIN board/freescale/mx6sabresd/plugin.bin 0x00907000
#else
#ifdef CONFIG_IMX_HAB
CSF CONFIG_CSF_SIZE
#endif
/*
* Device Configuration Data (DCD)
*
* Each entry must have the format:
* Addr-type Address Value
*
* where:
* Addr-type register length (1,2 or 4 bytes)
* Address absolute address of the register
* value value to be stored in the register
*/
#ifdef CONFIG_IMX_OPTEE
SET_BIT 4 0x20c4070 0x3c00000
DATA 4 0x20e0024 0x00000003
CHECK_BITS_SET 4 0x20e0024 0x3
#endif
DATA 4 0x020e0774 0x000C0000
DATA 4 0x020e0754 0x00000000
DATA 4 0x020e04ac 0x00000030
DATA 4 0x020e04b0 0x00000030
DATA 4 0x020e0464 0x00000030
DATA 4 0x020e0490 0x00000030
DATA 4 0x020e074c 0x00000030
DATA 4 0x020e0494 0x00000030
DATA 4 0x020e04a0 0x00000000
DATA 4 0x020e04b4 0x00000030
DATA 4 0x020e04b8 0x00000030
DATA 4 0x020e076c 0x00000030
DATA 4 0x020e0750 0x00020000
DATA 4 0x020e04bc 0x00000030
DATA 4 0x020e04c0 0x00000030
DATA 4 0x020e04c4 0x00000030
DATA 4 0x020e04c8 0x00000030
DATA 4 0x020e04cc 0x00000030
DATA 4 0x020e04d0 0x00000030
DATA 4 0x020e04d4 0x00000030
DATA 4 0x020e04d8 0x00000030
DATA 4 0x020e0760 0x00020000
DATA 4 0x020e0764 0x00000030
DATA 4 0x020e0770 0x00000030
DATA 4 0x020e0778 0x00000030
DATA 4 0x020e077c 0x00000030
DATA 4 0x020e0780 0x00000030
DATA 4 0x020e0784 0x00000030
DATA 4 0x020e078c 0x00000030
DATA 4 0x020e0748 0x00000030
DATA 4 0x020e0470 0x00000030
DATA 4 0x020e0474 0x00000030
DATA 4 0x020e0478 0x00000030
DATA 4 0x020e047c 0x00000030
DATA 4 0x020e0480 0x00000030
DATA 4 0x020e0484 0x00000030
DATA 4 0x020e0488 0x00000030
DATA 4 0x020e048c 0x00000030
DATA 4 0x021b0800 0xa1390003
DATA 4 0x021b080c 0x001F001F
DATA 4 0x021b0810 0x001F001F
DATA 4 0x021b480c 0x001F001F
DATA 4 0x021b4810 0x001F001F
DATA 4 0x021b083c 0x4220021F
DATA 4 0x021b0840 0x0207017E
DATA 4 0x021b483c 0x4201020C
DATA 4 0x021b4840 0x01660172
DATA 4 0x021b0848 0x4A4D4E4D
DATA 4 0x021b4848 0x4A4F5049
DATA 4 0x021b0850 0x3F3C3D31
DATA 4 0x021b4850 0x3238372B
DATA 4 0x021b081c 0x33333333
DATA 4 0x021b0820 0x33333333
DATA 4 0x021b0824 0x33333333
DATA 4 0x021b0828 0x33333333
DATA 4 0x021b481c 0x33333333
DATA 4 0x021b4820 0x33333333
DATA 4 0x021b4824 0x33333333
DATA 4 0x021b4828 0x33333333
DATA 4 0x021b08b8 0x00000800
DATA 4 0x021b48b8 0x00000800
DATA 4 0x021b0004 0x0002002D
DATA 4 0x021b0008 0x00333030
DATA 4 0x021b000c 0x3F435313
DATA 4 0x021b0010 0xB66E8B63
DATA 4 0x021b0014 0x01FF00DB
DATA 4 0x021b0018 0x00001740
DATA 4 0x021b001c 0x00008000
DATA 4 0x021b002c 0x000026d2
DATA 4 0x021b0030 0x00431023
DATA 4 0x021b0040 0x00000027
DATA 4 0x021b0000 0x831A0000
DATA 4 0x021b001c 0x04008032
DATA 4 0x021b001c 0x00008033
DATA 4 0x021b001c 0x00048031
DATA 4 0x021b001c 0x05208030
DATA 4 0x021b001c 0x04008040
DATA 4 0x021b0020 0x00005800
DATA 4 0x021b0818 0x00011117
DATA 4 0x021b4818 0x00011117
DATA 4 0x021b0004 0x0002556D
DATA 4 0x021b0404 0x00011006
DATA 4 0x021b001c 0x00000000
/* set the default clock gate to save power */
DATA 4 0x020c4068 0x00C03F3F
DATA 4 0x020c406c 0x0030FC03
DATA 4 0x020c4070 0x0FFFF000
DATA 4 0x020c4074 0x3FF00000
DATA 4 0x020c4078 0x00FFF300
DATA 4 0x020c407c 0x0F0000C3
DATA 4 0x020c4080 0x000003FF
/* enable AXI cache for VDOA/VPU/IPU */
DATA 4 0x020e0010 0xF00000CF
/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
DATA 4 0x020e0018 0x007F007F
DATA 4 0x020e001c 0x007F007F
#endif
board/seco/imx6dl_santino/mx6q_4x_mt41j128.cfg deleted 100644 → 0
+ 0
− 160
View file @ 9de3fb7e
/*
* Copyright (C) 2011-2016 Freescale Semiconductor, Inc.
* Copyright 2017 NXP
* Jason Liu <r64343@freescale.com>
*
* SPDX-License-Identifier: GPL-2.0+
*
* Refer doc/README.imximage for more details about how-to configure
* and create imximage boot image
*
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */
IMAGE_VERSION 2
/*
* Boot Device : one of
* spi, sd (the board has no nand neither onenand)
*/
BOOT_FROM sd
#ifdef CONFIG_USE_IMXIMG_PLUGIN
/*PLUGIN plugin-binary-file IRAM_FREE_START_ADDR*/
PLUGIN board/freescale/mx6sabresd/plugin.bin 0x00907000
#else
#ifdef CONFIG_IMX_HAB
CSF CONFIG_CSF_SIZE
#endif
/*
* Device Configuration Data (DCD)
*
* Each entry must have the format:
* Addr-type Address Value
*
* where:
* Addr-type register length (1,2 or 4 bytes)
* Address absolute address of the register
* value value to be stored in the register
*/
#ifdef CONFIG_IMX_OPTEE
SET_BIT 4 0x20c4070 0x3c00000
DATA 4 0x20e0024 0x00000003
CHECK_BITS_SET 4 0x20e0024 0x3
#endif
DATA 4 0x020e0798 0x000C0000
DATA 4 0x020e0758 0x00000000
DATA 4 0x020e0588 0x00000030
DATA 4 0x020e0594 0x00000030
DATA 4 0x020e056c 0x00000030
DATA 4 0x020e0578 0x00000030
DATA 4 0x020e074c 0x00000030
DATA 4 0x020e057c 0x00000030
DATA 4 0x020e058c 0x00000000
DATA 4 0x020e059c 0x00000030
DATA 4 0x020e05a0 0x00000030
DATA 4 0x020e078c 0x00000030
DATA 4 0x020e0750 0x00020000
DATA 4 0x020e05a8 0x00000030
DATA 4 0x020e05b0 0x00000030
DATA 4 0x020e0524 0x00000030
DATA 4 0x020e051c 0x00000030
DATA 4 0x020e0518 0x00000030
DATA 4 0x020e050c 0x00000030
DATA 4 0x020e05b8 0x00000030
DATA 4 0x020e05c0 0x00000030
DATA 4 0x020e0774 0x00020000
DATA 4 0x020e0784 0x00000030
DATA 4 0x020e0788 0x00000030
DATA 4 0x020e0794 0x00000030
DATA 4 0x020e079c 0x00000030
DATA 4 0x020e07a0 0x00000030
DATA 4 0x020e07a4 0x00000030
DATA 4 0x020e07a8 0x00000030
DATA 4 0x020e0748 0x00000030
DATA 4 0x020e05ac 0x00000030
DATA 4 0x020e05b4 0x00000030
DATA 4 0x020e0528 0x00000030
DATA 4 0x020e0520 0x00000030
DATA 4 0x020e0514 0x00000030
DATA 4 0x020e0510 0x00000030
DATA 4 0x020e05bc 0x00000030
DATA 4 0x020e05c4 0x00000030
DATA 4 0x021b0800 0xa1390003
DATA 4 0x021b080c 0x001F001F
DATA 4 0x021b0810 0x001F001F
DATA 4 0x021b480c 0x001F001F
DATA 4 0x021b4810 0x001F001F
DATA 4 0x021b083c 0x43270338
DATA 4 0x021b0840 0x03200314
DATA 4 0x021b483c 0x431A032F
DATA 4 0x021b4840 0x03200263
DATA 4 0x021b0848 0x4B434748
DATA 4 0x021b4848 0x4445404C
DATA 4 0x021b0850 0x38444542
DATA 4 0x021b4850 0x4935493A
DATA 4 0x021b081c 0x33333333
DATA 4 0x021b0820 0x33333333
DATA 4 0x021b0824 0x33333333
DATA 4 0x021b0828 0x33333333
DATA 4 0x021b481c 0x33333333
DATA 4 0x021b4820 0x33333333
DATA 4 0x021b4824 0x33333333
DATA 4 0x021b4828 0x33333333
DATA 4 0x021b08b8 0x00000800
DATA 4 0x021b48b8 0x00000800
DATA 4 0x021b0004 0x00020036
DATA 4 0x021b0008 0x09444040
DATA 4 0x021b000c 0x555A7975
DATA 4 0x021b0010 0xFF538F64
DATA 4 0x021b0014 0x01FF00DB
DATA 4 0x021b0018 0x00001740
DATA 4 0x021b001c 0x00008000
DATA 4 0x021b002c 0x000026d2
DATA 4 0x021b0030 0x005A1023
DATA 4 0x021b0040 0x00000027
DATA 4 0x021b0000 0x831A0000
DATA 4 0x021b001c 0x04088032
DATA 4 0x021b001c 0x00008033
DATA 4 0x021b001c 0x00048031
DATA 4 0x021b001c 0x09408030
DATA 4 0x021b001c 0x04008040
DATA 4 0x021b0020 0x00005800
DATA 4 0x021b0818 0x00011117
DATA 4 0x021b4818 0x00011117
DATA 4 0x021b0004 0x00025576
DATA 4 0x021b0404 0x00011006
DATA 4 0x021b001c 0x00000000
/* set the default clock gate to save power */
DATA 4 0x020c4068 0x00C03F3F
DATA 4 0x020c406c 0x0030FC03
DATA 4 0x020c4070 0x0FFFF000
DATA 4 0x020c4074 0x3FF00000
DATA 4 0x020c4078 0x00FFF300
DATA 4 0x020c407c 0x0F0000F3
DATA 4 0x020c4080 0x000003FF
/* enable AXI cache for VDOA/VPU/IPU */
DATA 4 0x020e0010 0xF00000CF
/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
DATA 4 0x020e0018 0x007F007F
DATA 4 0x020e001c 0x007F007F
/*
* Setup CCM_CCOSR register as follows:
*
* cko1_en = 1 --> CKO1 enabled
* cko1_div = 111 --> divide by 8
* cko1_sel = 1011 --> ahb_clk_root
*
* This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz
*/
DATA 4 0x020c4060 0x000000fb
#endif
board/seco/imx6dl_santino/mx6qp.cfg deleted 100644 → 0
+ 0
− 161
View file @ 9de3fb7e
/*
* Copyright (C) 2015-2016 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*
* Refer doc/README.imximage for more details about how-to configure
* and create imximage boot image
*
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */
IMAGE_VERSION 2
/*
* Boot Device : one of
* spi, sd (the board has no nand neither onenand)
*/
BOOT_FROM sd
#ifdef CONFIG_USE_IMXIMG_PLUGIN
/*PLUGIN plugin-binary-file IRAM_FREE_START_ADDR*/
PLUGIN board/freescale/mx6sabresd/plugin.bin 0x00907000
#else
#ifdef CONFIG_IMX_HAB
CSF CONFIG_CSF_SIZE
#endif
/*
* Device Configuration Data (DCD)
*
* Each entry must have the format:
* Addr-type Address Value
*
* where:
* Addr-type register length (1,2 or 4 bytes)
* Address absolute address of the register
* value value to be stored in the register
*/
DATA 4, 0x020e0798, 0x000c0000
DATA 4, 0x020e0758, 0x00000000
DATA 4, 0x020e0588, 0x00000030
DATA 4, 0x020e0594, 0x00000030
DATA 4, 0x020e056c, 0x00000030
DATA 4, 0x020e0578, 0x00000030
DATA 4, 0x020e074c, 0x00000030
DATA 4, 0x020e057c, 0x00000030
DATA 4, 0x020e058c, 0x00000000
DATA 4, 0x020e059c, 0x00000030
DATA 4, 0x020e05a0, 0x00000030
DATA 4, 0x020e078c, 0x00000030
DATA 4, 0x020e0750, 0x00020000
DATA 4, 0x020e05a8, 0x00000030
DATA 4, 0x020e05b0, 0x00000030
DATA 4, 0x020e0524, 0x00000030
DATA 4, 0x020e051c, 0x00000030
DATA 4, 0x020e0518, 0x00000030
DATA 4, 0x020e050c, 0x00000030
DATA 4, 0x020e05b8, 0x00000030
DATA 4, 0x020e05c0, 0x00000030
DATA 4, 0x020e0534, 0x00018200
DATA 4, 0x020e0538, 0x00008000
DATA 4, 0x020e053c, 0x00018200
DATA 4, 0x020e0540, 0x00018200
DATA 4, 0x020e0544, 0x00018200
DATA 4, 0x020e0548, 0x00018200
DATA 4, 0x020e054c, 0x00018200
DATA 4, 0x020e0550, 0x00018200
DATA 4, 0x020e0774, 0x00020000
DATA 4, 0x020e0784, 0x00000030
DATA 4, 0x020e0788, 0x00000030
DATA 4, 0x020e0794, 0x00000030
DATA 4, 0x020e079c, 0x00000030
DATA 4, 0x020e07a0, 0x00000030
DATA 4, 0x020e07a4, 0x00000030
DATA 4, 0x020e07a8, 0x00000030
DATA 4, 0x020e0748, 0x00000030
DATA 4, 0x020e05ac, 0x00000030
DATA 4, 0x020e05b4, 0x00000030
DATA 4, 0x020e0528, 0x00000030
DATA 4, 0x020e0520, 0x00000030
DATA 4, 0x020e0514, 0x00000030
DATA 4, 0x020e0510, 0x00000030
DATA 4, 0x020e05bc, 0x00000030
DATA 4, 0x020e05c4, 0x00000030
DATA 4, 0x021b0800, 0xa1390003
DATA 4, 0x021b080c, 0x001b001e
DATA 4, 0x021b0810, 0x002e0029
DATA 4, 0x021b480c, 0x001b002a
DATA 4, 0x021b4810, 0x0019002c
DATA 4, 0x021b083c, 0x43240334
DATA 4, 0x021b0840, 0x0324031a
DATA 4, 0x021b483c, 0x43340344
DATA 4, 0x021b4840, 0x03280276
DATA 4, 0x021b0848, 0x44383A3E
DATA 4, 0x021b4848, 0x3C3C3846
DATA 4, 0x021b0850, 0x2e303230
DATA 4, 0x021b4850, 0x38283E34
DATA 4, 0x021b081c, 0x33333333
DATA 4, 0x021b0820, 0x33333333
DATA 4, 0x021b0824, 0x33333333
DATA 4, 0x021b0828, 0x33333333
DATA 4, 0x021b481c, 0x33333333
DATA 4, 0x021b4820, 0x33333333
DATA 4, 0x021b4824, 0x33333333
DATA 4, 0x021b4828, 0x33333333
DATA 4, 0x021b08c0, 0x24912489
DATA 4, 0x021b48c0, 0x24914452
DATA 4, 0x021b08b8, 0x00000800
DATA 4, 0x021b48b8, 0x00000800
DATA 4, 0x021b0004, 0x00020036
DATA 4, 0x021b0008, 0x24444040
DATA 4, 0x021b000c, 0x555A7955
DATA 4, 0x021b0010, 0xFF320F64
DATA 4, 0x021b0014, 0x01ff00db
DATA 4, 0x021b0018, 0x00011740
DATA 4, 0x021b001c, 0x00008000
DATA 4, 0x021b002c, 0x000026d2
DATA 4, 0x021b0030, 0x005A1023
DATA 4, 0x021b0040, 0x00000027
DATA 4, 0x021b0400, 0x14420000
DATA 4, 0x021b0000, 0x831A0000
DATA 4, 0x021b0890, 0x00400C58
DATA 4, 0x00bb0008, 0x00000000
DATA 4, 0x00bb000c, 0x2891E41A
DATA 4, 0x00bb0038, 0x00000564
DATA 4, 0x00bb0014, 0x00000040
DATA 4, 0x00bb0028, 0x00000020
DATA 4, 0x00bb002c, 0x00000020
DATA 4, 0x021b001c, 0x04088032
DATA 4, 0x021b001c, 0x00008033
DATA 4, 0x021b001c, 0x00048031
DATA 4, 0x021b001c, 0x09408030
DATA 4, 0x021b001c, 0x04008040
DATA 4, 0x021b0020, 0x00005800
DATA 4, 0x021b0818, 0x00011117
DATA 4, 0x021b4818, 0x00011117
DATA 4, 0x021b0004, 0x00025576
DATA 4, 0x021b0404, 0x00011006
DATA 4, 0x021b001c, 0x00000000
/* set the default clock gate to save power */
DATA 4, 0x020c4068, 0x00C03F3F
DATA 4, 0x020c406c, 0x0030FC03
DATA 4, 0x020c4070, 0x0FFFF000
DATA 4, 0x020c4074, 0x3FF00000
DATA 4, 0x020c4078, 0x00FFF300
DATA 4, 0x020c407c, 0x0F0000F3
DATA 4, 0x020c4080, 0x000003FF
/* enable AXI cache for VDOA/VPU/IPU */
DATA 4, 0x020e0010, 0xF00000CF
/* set IPU AXI-id1 Qos=0x1 AXI-id0/2/3 Qos=0x7 */
DATA 4, 0x020e0018, 0x77177717
DATA 4, 0x020e001c, 0x77177717
#endif
board/seco/imx6dl_santino/mx6qp_optee.cfg deleted 100644 → 0
+ 0
− 161
View file @ 9de3fb7e
/*
* Copyright (C) 2015-2016 Freescale Semiconductor, Inc.
* Copyright 2017 NXP
*
* SPDX-License-Identifier: GPL-2.0+
*
* Refer doc/README.imximage for more details about how-to configure
* and create imximage boot image
*
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */
IMAGE_VERSION 2
/*
* Boot Device : one of
* spi, sd (the board has no nand neither onenand)
*/
BOOT_FROM sd
#ifdef CONFIG_USE_IMXIMG_PLUGIN
/*PLUGIN plugin-binary-file IRAM_FREE_START_ADDR*/
PLUGIN board/freescale/mx6sabresd/plugin.bin 0x00907000
#else
#ifdef CONFIG_IMX_HAB
CSF CONFIG_CSF_SIZE
#endif
/*
* Device Configuration Data (DCD)
*
* Each entry must have the format:
* Addr-type Address Value
*
* where:
* Addr-type register length (1,2 or 4 bytes)
* Address absolute address of the register
* value value to be stored in the register
*/
#ifdef CONFIG_IMX_OPTEE
SET_BIT 4 0x20c4070 0x3c00000
DATA 4 0x20e0024 0x00000003
CHECK_BITS_SET 4 0x20e0024 0x3
#endif
DATA 4, 0x020e0798, 0x000c0000
DATA 4, 0x020e0758, 0x00000000
DATA 4, 0x020e0588, 0x00000030
DATA 4, 0x020e0594, 0x00000030
DATA 4, 0x020e056c, 0x00000030
DATA 4, 0x020e0578, 0x00000030
DATA 4, 0x020e074c, 0x00000030
DATA 4, 0x020e057c, 0x00000030
DATA 4, 0x020e058c, 0x00000000
DATA 4, 0x020e059c, 0x00000030
DATA 4, 0x020e05a0, 0x00000030
DATA 4, 0x020e078c, 0x00000030
DATA 4, 0x020e0750, 0x00020000
DATA 4, 0x020e05a8, 0x00000030
DATA 4, 0x020e05b0, 0x00000030
DATA 4, 0x020e0524, 0x00000030
DATA 4, 0x020e051c, 0x00000030
DATA 4, 0x020e0518, 0x00000030
DATA 4, 0x020e050c, 0x00000030
DATA 4, 0x020e05b8, 0x00000030
DATA 4, 0x020e05c0, 0x00000030
DATA 4, 0x020e0534, 0x00018200
DATA 4, 0x020e0538, 0x00008000
DATA 4, 0x020e053c, 0x00018200
DATA 4, 0x020e0540, 0x00018200
DATA 4, 0x020e0544, 0x00018200
DATA 4, 0x020e0548, 0x00018200
DATA 4, 0x020e054c, 0x00018200
DATA 4, 0x020e0550, 0x00018200
DATA 4, 0x020e0774, 0x00020000
DATA 4, 0x020e0784, 0x00000030
DATA 4, 0x020e0788, 0x00000030
DATA 4, 0x020e0794, 0x00000030
DATA 4, 0x020e079c, 0x00000030
DATA 4, 0x020e07a0, 0x00000030
DATA 4, 0x020e07a4, 0x00000030
DATA 4, 0x020e07a8, 0x00000030
DATA 4, 0x020e0748, 0x00000030
DATA 4, 0x020e05ac, 0x00000030
DATA 4, 0x020e05b4, 0x00000030
DATA 4, 0x020e0528, 0x00000030
DATA 4, 0x020e0520, 0x00000030
DATA 4, 0x020e0514, 0x00000030
DATA 4, 0x020e0510, 0x00000030
DATA 4, 0x020e05bc, 0x00000030
DATA 4, 0x020e05c4, 0x00000030
DATA 4, 0x021b0800, 0xa1390003
DATA 4, 0x021b080c, 0x001b001e
DATA 4, 0x021b0810, 0x002e0029
DATA 4, 0x021b480c, 0x001b002a
DATA 4, 0x021b4810, 0x0019002c
DATA 4, 0x021b083c, 0x43240334
DATA 4, 0x021b0840, 0x0324031a
DATA 4, 0x021b483c, 0x43340344
DATA 4, 0x021b4840, 0x03280276
DATA 4, 0x021b0848, 0x44383A3E
DATA 4, 0x021b4848, 0x3C3C3846
DATA 4, 0x021b0850, 0x2e303230
DATA 4, 0x021b4850, 0x38283E34
DATA 4, 0x021b081c, 0x33333333
DATA 4, 0x021b0820, 0x33333333
DATA 4, 0x021b0824, 0x33333333
DATA 4, 0x021b0828, 0x33333333
DATA 4, 0x021b481c, 0x33333333
DATA 4, 0x021b4820, 0x33333333
DATA 4, 0x021b4824, 0x33333333
DATA 4, 0x021b4828, 0x33333333
DATA 4, 0x021b08c0, 0x24912489
DATA 4, 0x021b48c0, 0x24914452
DATA 4, 0x021b08b8, 0x00000800
DATA 4, 0x021b48b8, 0x00000800
DATA 4, 0x021b0004, 0x00020036
DATA 4, 0x021b0008, 0x24444040
DATA 4, 0x021b000c, 0x555A7955
DATA 4, 0x021b0010, 0xFF320F64
DATA 4, 0x021b0014, 0x01ff00db
DATA 4, 0x021b0018, 0x00011740
DATA 4, 0x021b001c, 0x00008000
DATA 4, 0x021b002c, 0x000026d2
DATA 4, 0x021b0030, 0x005A1023
DATA 4, 0x021b0040, 0x00000027
DATA 4, 0x021b0400, 0x10420000
DATA 4, 0x021b0000, 0x831A0000
DATA 4, 0x021b0890, 0x00400C58
DATA 4, 0x021b001c, 0x04088032
DATA 4, 0x021b001c, 0x00008033
DATA 4, 0x021b001c, 0x00048031
DATA 4, 0x021b001c, 0x09408030
DATA 4, 0x021b001c, 0x04008040
DATA 4, 0x021b0020, 0x00005800
DATA 4, 0x021b0818, 0x00011117
DATA 4, 0x021b4818, 0x00011117
DATA 4, 0x021b0004, 0x00025576
DATA 4, 0x021b0404, 0x00011006
DATA 4, 0x021b001c, 0x00000000
/* set the default clock gate to save power */
DATA 4, 0x020c4068, 0x00C03F3F
DATA 4, 0x020c406c, 0x0030FC03
DATA 4, 0x020c4070, 0x0FFFF000
DATA 4, 0x020c4074, 0x3FF00000
DATA 4, 0x020c4078, 0x00FFF300
DATA 4, 0x020c407c, 0x0F0000F3
DATA 4, 0x020c4080, 0x000003FF
/* enable AXI cache for VDOA/VPU/IPU */
DATA 4, 0x020e0010, 0xF00000CF
/* set IPU AXI-id1 Qos=0x1 AXI-id0/2/3 Qos=0x7 */
DATA 4, 0x020e0018, 0x77177717
DATA 4, 0x020e001c, 0x77177717
#endif
board/seco/imx6dl_santino/mx6solo_4x_mt41j128.cfg deleted 100644 → 0
+ 0
− 125
View file @ 9de3fb7e
/*
* Copyright (C) 2014-2016 Freescale Semiconductor, Inc.
* Copyright 2017 NXP
* Jason Liu <r64343@freescale.com>
*
* SPDX-License-Identifier: GPL-2.0+
*
* Refer docs/README.imxmage for more details about how-to configure
* and create imximage boot image
*
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */
IMAGE_VERSION 2
/*
* Boot Device : one of
* spi, sd (the board has no nand neither onenand)
*/
BOOT_FROM sd
#ifdef CONFIG_USE_IMXIMG_PLUGIN
/*PLUGIN plugin-binary-file IRAM_FREE_START_ADDR*/
PLUGIN board/freescale/mx6sabresd/plugin.bin 0x00907000
#else
#ifdef CONFIG_IMX_HAB
CSF CONFIG_CSF_SIZE
#endif
/*
* Device Configuration Data (DCD)
*
* Each entry must have the format:
* Addr-type Address Value
*
* where:
* Addr-type register length (1,2 or 4 bytes)
* Address absolute address of the register
* value value to be stored in the register
*/
#ifdef CONFIG_IMX_OPTEE
SET_BIT 4 0x20c4070 0x3c00000
DATA 4 0x20e0024 0x00000003
CHECK_BITS_SET 4 0x20e0024 0x3
#endif
DATA 4, 0x020e0774, 0x000C0000
DATA 4, 0x020e0754, 0x00000000
DATA 4, 0x020e04ac, 0x00000030
DATA 4, 0x020e04b0, 0x00000030
DATA 4, 0x020e0464, 0x00000030
DATA 4, 0x020e0490, 0x00000030
DATA 4, 0x020e074c, 0x00000030
DATA 4, 0x020e0494, 0x00000030
DATA 4, 0x020e04a0, 0x00000000
DATA 4, 0x020e04b4, 0x00000030
DATA 4, 0x020e04b8, 0x00000030
DATA 4, 0x020e076c, 0x00000030
DATA 4, 0x020e0750, 0x00020000
DATA 4, 0x020e04bc, 0x00000030
DATA 4, 0x020e04c0, 0x00000030
DATA 4, 0x020e04c4, 0x00000030
DATA 4, 0x020e04c8, 0x00000030
DATA 4, 0x020e0760, 0x00020000
DATA 4, 0x020e0764, 0x00000030
DATA 4, 0x020e0770, 0x00000030
DATA 4, 0x020e0778, 0x00000030
DATA 4, 0x020e077c, 0x00000030
DATA 4, 0x020e0470, 0x00000030
DATA 4, 0x020e0474, 0x00000030
DATA 4, 0x020e0478, 0x00000030
DATA 4, 0x020e047c, 0x00000030
DATA 4, 0x021b0800, 0xa1390003
DATA 4, 0x021b080c, 0x001F001F
DATA 4, 0x021b0810, 0x001F001F
DATA 4, 0x021b083c, 0x42190219
DATA 4, 0x021b0840, 0x017B0177
DATA 4, 0x021b0848, 0x4B4D4E4D
DATA 4, 0x021b0850, 0x3F3E2D36
DATA 4, 0x021b081c, 0x33333333
DATA 4, 0x021b0820, 0x33333333
DATA 4, 0x021b0824, 0x33333333
DATA 4, 0x021b0828, 0x33333333
DATA 4, 0x021b08b8, 0x00000800
DATA 4, 0x021b0004, 0x0002002D
DATA 4, 0x021b0008, 0x00333030
DATA 4, 0x021b000c, 0x3F435313
DATA 4, 0x021b0010, 0xB66E8B63
DATA 4, 0x021b0014, 0x01FF00DB
DATA 4, 0x021b0018, 0x00001740
DATA 4, 0x021b001c, 0x00008000
DATA 4, 0x021b002c, 0x000026d2
DATA 4, 0x021b0030, 0x00431023
DATA 4, 0x021b0040, 0x00000017
DATA 4, 0x021b0000, 0x83190000
DATA 4, 0x021b001c, 0x04008032
DATA 4, 0x021b001c, 0x00008033
DATA 4, 0x021b001c, 0x00048031
DATA 4, 0x021b001c, 0x05208030
DATA 4, 0x021b001c, 0x04008040
DATA 4, 0x021b0020, 0x00005800
DATA 4, 0x021b0818, 0x00011117
DATA 4, 0x021b0004, 0x0002556D
DATA 4, 0x021b0404, 0x00011006
DATA 4, 0x021b001c, 0x00000000
/* set the default clock gate to save power */
DATA 4, 0x020c4068, 0x00C03F3F
DATA 4, 0x020c406c, 0x0030FC03
DATA 4, 0x020c4070, 0x0FFFF000
DATA 4, 0x020c4074, 0x3FF00000
DATA 4, 0x020c4078, 0x00FFF300
DATA 4, 0x020c407c, 0x0F0000C3
DATA 4, 0x020c4080, 0x000003FF
/* enable AXI cache for VDOA/VPU/IPU */
DATA 4, 0x020e0010, 0xF00000CF
/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
DATA 4, 0x020e0018, 0x007F007F
DATA 4, 0x020e001c, 0x007F007F
#endif
board/seco/imx6dl_santino/plugin.S deleted 100644 → 0
+ 0
− 690
View file @ 9de3fb7e
/*
* Copyright (C) 2012-2016 Freescale Semiconductor, Inc.
* Copyright 2017 NXP
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
/* DDR script */
.macro imx6dqpsabresd_ddr_setting
ldr r0, =IOMUXC_BASE_ADDR
ldr r1, =0x000c0000
str r1, [r0, #0x798]
ldr r1, =0x00000000
str r1, [r0, #0x758]
ldr r1, =0x00000030
str r1, [r0, #0x588]
str r1, [r0, #0x594]
str r1, [r0, #0x56c]
str r1, [r0, #0x578]
str r1, [r0, #0x74c]
str r1, [r0, #0x57c]
ldr r1, =0x00000000
str r1, [r0, #0x58c]
ldr r1, =0x00000030
str r1, [r0, #0x59c]
str r1, [r0, #0x5a0]
str r1, [r0, #0x78c]
ldr r1, =0x00020000
str r1, [r0, #0x750]
ldr r1, =0x00000030
str r1, [r0, #0x5a8]
str r1, [r0, #0x5b0]
str r1, [r0, #0x524]
str r1, [r0, #0x51c]
str r1, [r0, #0x518]
str r1, [r0, #0x50c]
str r1, [r0, #0x5b8]
str r1, [r0, #0x5c0]
ldr r1, =0x00018200
str r1, [r0, #0x534]
ldr r1, =0x00008000
str r1, [r0, #0x538]
ldr r1, =0x00018200
str r1, [r0, #0x53c]
str r1, [r0, #0x540]
str r1, [r0, #0x544]
str r1, [r0, #0x548]
str r1, [r0, #0x54c]
str r1, [r0, #0x550]
ldr r1, =0x00020000
str r1, [r0, #0x774]
ldr r1, =0x00000030
str r1, [r0, #0x784]
str r1, [r0, #0x788]
str r1, [r0, #0x794]
str r1, [r0, #0x79c]
str r1, [r0, #0x7a0]
str r1, [r0, #0x7a4]
str r1, [r0, #0x7a8]
str r1, [r0, #0x748]
str r1, [r0, #0x5ac]
str r1, [r0, #0x5b4]
str r1, [r0, #0x528]
str r1, [r0, #0x520]
str r1, [r0, #0x514]
str r1, [r0, #0x510]
str r1, [r0, #0x5bc]
str r1, [r0, #0x5c4]
ldr r0, =MMDC_P0_BASE_ADDR
ldr r2, =0xa1390003
str r2, [r0, #0x800]
ldr r2, =0x001b001e
str r2, [r0, #0x80c]
ldr r2, =0x002e0029
str r2, [r0, #0x810]
ldr r1, =MMDC_P1_BASE_ADDR
ldr r2, =0x001b002a
str r2, [r1, #0x80c]
ldr r2, =0x0019002c
str r2, [r1, #0x810]
ldr r2, =0x43240334
str r2, [r0, #0x83c]
ldr r2, =0x0324031a
str r2, [r0, #0x840]
ldr r2, =0x43340344
str r2, [r1, #0x83c]
ldr r2, =0x03280276
str r2, [r1, #0x840]
ldr r2, =0x44383A3E
str r2, [r0, #0x848]
ldr r2, =0x3C3C3846
str r2, [r1, #0x848]
ldr r2, =0x2e303230
str r2, [r0, #0x850]
ldr r2, =0x38283E34
str r2, [r1, #0x850]
ldr r2, =0x33333333
str r2, [r0, #0x81c]
str r2, [r0, #0x820]
str r2, [r0, #0x824]
str r2, [r0, #0x828]
str r2, [r1, #0x81c]
str r2, [r1, #0x820]
str r2, [r1, #0x824]
str r2, [r1, #0x828]
ldr r2, =0x24912489
str r2, [r0, #0x8c0]
ldr r2, =0x24914452
str r2, [r1, #0x8c0]
ldr r2, =0x00000800
str r2, [r0, #0x8b8]
str r2, [r1, #0x8b8]
ldr r2, =0x00020036
str r2, [r0, #0x004]
ldr r2, =0x24444040
str r2, [r0, #0x008]
ldr r2, =0x555A7955
str r2, [r0, #0x00c]
ldr r2, =0xFF320F64
str r2, [r0, #0x010]
ldr r2, =0x01FF00DB
str r2, [r0, #0x014]
ldr r2, =0x00011740
str r2, [r0, #0x018]
ldr r2, =0x00008000
str r2, [r0, #0x01c]
ldr r2, =0x000026d2
str r2, [r0, #0x02c]
ldr r2, =0x005A1023
str r2, [r0, #0x030]
ldr r2, =0x00000027
str r2, [r0, #0x040]
ldr r2, =0x14420000
str r2, [r0, #0x400]
ldr r2, =0x831A0000
str r2, [r0, #0x000]
ldr r2, =0x00400C58
str r2, [r0, #0x890]
ldr r3, =0x00bb0000
ldr r2, =0x00000000
str r2, [r3, #0x008]
ldr r2, =0x2891E41A
str r2, [r3, #0x00C]
ldr r2, =0x00000564
str r2, [r3, #0x038]
ldr r2, =0x00000040
str r2, [r3, #0x014]
ldr r2, =0x00000020
str r2, [r3, #0x028]
ldr r2, =0x00000020
str r2, [r3, #0x02c]
ldr r2, =0x04088032
str r2, [r0, #0x01c]
ldr r2, =0x00008033
str r2, [r0, #0x01c]
ldr r2, =0x00048031
str r2, [r0, #0x01c]
ldr r2, =0x09408030
str r2, [r0, #0x01c]
ldr r2, =0x04008040
str r2, [r0, #0x01c]
ldr r2, =0x00005800
str r2, [r0, #0x020]
ldr r2, =0x00011117
str r2, [r0, #0x818]
str r2, [r1, #0x818]
ldr r2, =0x00025576
str r2, [r0, #0x004]
ldr r2, =0x00011006
str r2, [r0, #0x404]
ldr r2, =0x00000000
str r2, [r0, #0x01c]
.endm
.macro imx6dqsabresd_ddr_setting
ldr r0, =IOMUXC_BASE_ADDR
ldr r1, =0x000c0000
str r1, [r0, #0x798]
ldr r1, =0x00000000
str r1, [r0, #0x758]
ldr r1, =0x00000030
str r1, [r0, #0x588]
str r1, [r0, #0x594]
str r1, [r0, #0x56c]
str r1, [r0, #0x578]
str r1, [r0, #0x74c]
str r1, [r0, #0x57c]
ldr r1, =0x00000000
str r1, [r0, #0x58c]
ldr r1, =0x00000030
str r1, [r0, #0x59c]
str r1, [r0, #0x5a0]
str r1, [r0, #0x78c]
ldr r1, =0x00020000
str r1, [r0, #0x750]
ldr r1, =0x00000030
str r1, [r0, #0x5a8]
str r1, [r0, #0x5b0]
str r1, [r0, #0x524]
str r1, [r0, #0x51c]
str r1, [r0, #0x518]
str r1, [r0, #0x50c]
str r1, [r0, #0x5b8]
str r1, [r0, #0x5c0]
ldr r1, =0x00020000
str r1, [r0, #0x774]
ldr r1, =0x00000030
str r1, [r0, #0x784]
str r1, [r0, #0x788]
str r1, [r0, #0x794]
str r1, [r0, #0x79c]
str r1, [r0, #0x7a0]
str r1, [r0, #0x7a4]
str r1, [r0, #0x7a8]
str r1, [r0, #0x748]
str r1, [r0, #0x5ac]
str r1, [r0, #0x5b4]
str r1, [r0, #0x528]
str r1, [r0, #0x520]
str r1, [r0, #0x514]
str r1, [r0, #0x510]
str r1, [r0, #0x5bc]
str r1, [r0, #0x5c4]
ldr r0, =MMDC_P0_BASE_ADDR
ldr r2, =0xa1390003
str r2, [r0, #0x800]
ldr r2, =0x001F001F
str r2, [r0, #0x80c]
str r2, [r0, #0x810]
ldr r1, =MMDC_P1_BASE_ADDR
str r2, [r1, #0x80c]
str r2, [r1, #0x810]
ldr r2, =0x43270338
str r2, [r0, #0x83c]
ldr r2, =0x03200314
str r2, [r0, #0x840]
ldr r2, =0x431A032F
str r2, [r1, #0x83c]
ldr r2, =0x03200263
str r2, [r1, #0x840]
ldr r2, =0x4B434748
str r2, [r0, #0x848]
ldr r2, =0x4445404C
str r2, [r1, #0x848]
ldr r2, =0x38444542
str r2, [r0, #0x850]
ldr r2, =0x4935493A
str r2, [r1, #0x850]
ldr r2, =0x33333333
str r2, [r0, #0x81c]
str r2, [r0, #0x820]
str r2, [r0, #0x824]
str r2, [r0, #0x828]
str r2, [r1, #0x81c]
str r2, [r1, #0x820]
str r2, [r1, #0x824]
str r2, [r1, #0x828]
ldr r2, =0x00000800
str r2, [r0, #0x8b8]
str r2, [r1, #0x8b8]
ldr r2, =0x00020036
str r2, [r0, #0x004]
ldr r2, =0x09444040
str r2, [r0, #0x008]
ldr r2, =0x555A7975
str r2, [r0, #0x00c]
ldr r2, =0xFF538F64
str r2, [r0, #0x010]
ldr r2, =0x01FF00DB
str r2, [r0, #0x014]
ldr r2, =0x00001740
str r2, [r0, #0x018]
ldr r2, =0x00008000
str r2, [r0, #0x01c]
ldr r2, =0x000026d2
str r2, [r0, #0x02c]
ldr r2, =0x005A1023
str r2, [r0, #0x030]
ldr r2, =0x00000027
str r2, [r0, #0x040]
ldr r2, =0x831A0000
str r2, [r0, #0x000]
ldr r2, =0x04088032
str r2, [r0, #0x01c]
ldr r2, =0x00008033
str r2, [r0, #0x01c]
ldr r2, =0x00048031
str r2, [r0, #0x01c]
ldr r2, =0x09408030
str r2, [r0, #0x01c]
ldr r2, =0x04008040
str r2, [r0, #0x01c]
ldr r2, =0x00005800
str r2, [r0, #0x020]
ldr r2, =0x00011117
str r2, [r0, #0x818]
str r2, [r1, #0x818]
ldr r2, =0x00025576
str r2, [r0, #0x004]
ldr r2, =0x00011006
str r2, [r0, #0x404]
ldr r2, =0x00000000
str r2, [r0, #0x01c]
.endm
.macro imx6dlsabresd_ddr_setting
ldr r0, =IOMUXC_BASE_ADDR
ldr r1, =0x000c0000
str r1, [r0, #0x774]
ldr r1, =0x00000000
str r1, [r0, #0x754]
ldr r1, =0x00000030
str r1, [r0, #0x4ac]
str r1, [r0, #0x4b0]
str r1, [r0, #0x464]
str r1, [r0, #0x490]
str r1, [r0, #0x74c]
str r1, [r0, #0x494]
ldr r1, =0x00000000
str r1, [r0, #0x4a0]
ldr r1, =0x00000030
str r1, [r0, #0x4b4]
str r1, [r0, #0x4b8]
str r1, [r0, #0x76c]
ldr r1, =0x00020000
str r1, [r0, #0x750]
ldr r1, =0x00000030
str r1, [r0, #0x4bc]
str r1, [r0, #0x4c0]
str r1, [r0, #0x4c4]
str r1, [r0, #0x4c8]
str r1, [r0, #0x4cc]
str r1, [r0, #0x4d0]
str r1, [r0, #0x4d4]
str r1, [r0, #0x4d8]
ldr r1, =0x00020000
str r1, [r0, #0x760]
ldr r1, =0x00000030
str r1, [r0, #0x764]
str r1, [r0, #0x770]
str r1, [r0, #0x778]
str r1, [r0, #0x77c]
str r1, [r0, #0x780]
str r1, [r0, #0x784]
str r1, [r0, #0x78c]
str r1, [r0, #0x748]
str r1, [r0, #0x470]
str r1, [r0, #0x474]
str r1, [r0, #0x478]
str r1, [r0, #0x47c]
str r1, [r0, #0x480]
str r1, [r0, #0x484]
str r1, [r0, #0x488]
str r1, [r0, #0x48c]
ldr r0, =MMDC_P0_BASE_ADDR
ldr r2, =0xa1390003
str r2, [r0, #0x800]
ldr r2, =0x001f001f
str r2, [r0, #0x80c]
str r2, [r0, #0x810]
ldr r1, =MMDC_P1_BASE_ADDR
str r2, [r1, #0x80c]
str r2, [r1, #0x810]
ldr r2, =0x4220021F
str r2, [r0, #0x83c]
ldr r2, =0x0207017E
str r2, [r0, #0x840]
ldr r2, =0x4201020C
str r2, [r1, #0x83c]
ldr r2, =0x01660172
str r2, [r1, #0x840]
ldr r2, =0x4A4D4E4D
str r2, [r0, #0x848]
ldr r2, =0x4A4F5049
str r2, [r1, #0x848]
ldr r2, =0x3F3C3D31
str r2, [r0, #0x850]
ldr r2, =0x3238372B
str r2, [r1, #0x850]
ldr r2, =0x33333333
str r2, [r0, #0x81c]
str r2, [r0, #0x820]
str r2, [r0, #0x824]
str r2, [r0, #0x828]
str r2, [r1, #0x81c]
str r2, [r1, #0x820]
str r2, [r1, #0x824]
str r2, [r1, #0x828]
ldr r2, =0x00000800
str r2, [r0, #0x8b8]
str r2, [r1, #0x8b8]
ldr r2, =0x0002002D
str r2, [r0, #0x004]
ldr r2, =0x00333030
str r2, [r0, #0x008]
ldr r2, =0x3F435313
str r2, [r0, #0x00c]
ldr r2, =0xB66E8B63
str r2, [r0, #0x010]
ldr r2, =0x01FF00DB
str r2, [r0, #0x014]
ldr r2, =0x00001740
str r2, [r0, #0x018]
ldr r2, =0x00008000
str r2, [r0, #0x01c]
ldr r2, =0x000026d2
str r2, [r0, #0x02c]
ldr r2, =0x00431023
str r2, [r0, #0x030]
ldr r2, =0x00000027
str r2, [r0, #0x040]
ldr r2, =0x831A0000
str r2, [r0, #0x000]
ldr r2, =0x04008032
str r2, [r0, #0x01c]
ldr r2, =0x00008033
str r2, [r0, #0x01c]
ldr r2, =0x00048031
str r2, [r0, #0x01c]
ldr r2, =0x05208030
str r2, [r0, #0x01c]
ldr r2, =0x04008040
str r2, [r0, #0x01c]
ldr r2, =0x00005800
str r2, [r0, #0x020]
ldr r2, =0x00011117
str r2, [r0, #0x818]
str r2, [r1, #0x818]
ldr r2, =0x0002556D
str r2, [r0, #0x004]
ldr r2, =0x00011006
str r2, [r0, #0x404]
ldr r2, =0x00000000
str r2, [r0, #0x01c]
.endm
.macro imx6solosabresd_ddr_setting
ldr r0, =IOMUXC_BASE_ADDR
ldr r1, =0x000c0000
str r1, [r0, #0x774]
ldr r1, =0x00000000
str r1, [r0, #0x754]
ldr r1, =0x00000030
str r1, [r0, #0x4ac]
str r1, [r0, #0x4b0]
str r1, [r0, #0x464]
str r1, [r0, #0x490]
str r1, [r0, #0x74c]
str r1, [r0, #0x494]
ldr r1, =0x00000000
str r1, [r0, #0x4a0]
ldr r1, =0x00000030
str r1, [r0, #0x4b4]
str r1, [r0, #0x4b8]
str r1, [r0, #0x76c]
ldr r1, =0x00020000
str r1, [r0, #0x750]
ldr r1, =0x00000030
str r1, [r0, #0x4bc]
str r1, [r0, #0x4c0]
str r1, [r0, #0x4c4]
str r1, [r0, #0x4c8]
ldr r1, =0x00020000
str r1, [r0, #0x760]
ldr r1, =0x00000030
str r1, [r0, #0x764]
str r1, [r0, #0x770]
str r1, [r0, #0x778]
str r1, [r0, #0x77c]
str r1, [r0, #0x470]
str r1, [r0, #0x474]
str r1, [r0, #0x478]
str r1, [r0, #0x47c]
ldr r0, =MMDC_P0_BASE_ADDR
ldr r2, =0xa1390003
str r2, [r0, #0x800]
ldr r2, =0x001F001F
str r2, [r0, #0x80c]
str r2, [r0, #0x810]
ldr r2, =0x42190219
str r2, [r0, #0x83c]
ldr r2, =0x017B0177
str r2, [r0, #0x840]
ldr r2, =0x4B4D4E4D
str r2, [r0, #0x848]
ldr r2, =0x3F3E2D36
str r2, [r0, #0x850]
ldr r2, =0x33333333
str r2, [r0, #0x81c]
str r2, [r0, #0x820]
str r2, [r0, #0x824]
str r2, [r0, #0x828]
ldr r2, =0x00000800
str r2, [r0, #0x8b8]
ldr r2, =0x0002002D
str r2, [r0, #0x004]
ldr r2, =0x00333030
str r2, [r0, #0x008]
ldr r2, =0x3F435313
str r2, [r0, #0x00c]
ldr r2, =0xB66E8B63
str r2, [r0, #0x010]
ldr r2, =0x01FF00DB
str r2, [r0, #0x014]
ldr r2, =0x00001740
str r2, [r0, #0x018]
ldr r2, =0x00008000
str r2, [r0, #0x01c]
ldr r2, =0x000026d2
str r2, [r0, #0x02c]
ldr r2, =0x00431023
str r2, [r0, #0x030]
ldr r2, =0x00000017
str r2, [r0, #0x040]
ldr r2, =0x83190000
str r2, [r0, #0x000]
ldr r2, =0x04008032
str r2, [r0, #0x01c]
ldr r2, =0x00008033
str r2, [r0, #0x01c]
ldr r2, =0x00048031
str r2, [r0, #0x01c]
ldr r2, =0x05208030
str r2, [r0, #0x01c]
ldr r2, =0x04008040
str r2, [r0, #0x01c]
ldr r2, =0x00005800
str r2, [r0, #0x020]
ldr r2, =0x00011117
str r2, [r0, #0x818]
ldr r2, =0x0002556D
str r2, [r0, #0x004]
ldr r2, =0x00011006
str r2, [r0, #0x404]
ldr r2, =0x00000000
str r2, [r0, #0x01c]
.endm
.macro imx6_clock_gating
ldr r0, =CCM_BASE_ADDR
ldr r1, =0x00C03F3F
str r1, [r0, #0x068]
ldr r1, =0x0030FC03
str r1, [r0, #0x06c]
ldr r1, =0x0FFFF000
str r1, [r0, #0x070]
ldr r1, =0x3FF00000
str r1, [r0, #0x074]
ldr r1, =0x00FFF300
str r1, [r0, #0x078]
ldr r1, =0x0F0000C3
str r1, [r0, #0x07c]
ldr r1, =0x000003FF
str r1, [r0, #0x080]
#ifdef CONFIG_IMX_OPTEE
#ifndef CONFIG_MX6QP
ldr r0, =0x20e0024
ldr r1, =0x3
str r1, [r0]
#endif
#endif
.endm
.macro imx6_qos_setting
ldr r0, =IOMUXC_BASE_ADDR
ldr r1, =0xF00000CF
str r1, [r0, #0x10]
#if defined(CONFIG_MX6QP)
ldr r1, =0x77177717
str r1, [r0, #0x18]
str r1, [r0, #0x1c]
#else
ldr r1, =0x007F007F
str r1, [r0, #0x18]
str r1, [r0, #0x1c]
#endif
.endm
.macro imx6_ddr_setting
#if defined (CONFIG_MX6S)
imx6solosabresd_ddr_setting
#elif defined (CONFIG_MX6DL)
imx6dlsabresd_ddr_setting
#elif defined (CONFIG_MX6QP)
imx6dqpsabresd_ddr_setting
#elif defined (CONFIG_MX6Q)
imx6dqsabresd_ddr_setting
#else
#error "SOC not configured"
#endif
.endm
/* include the common plugin code here */
#include <asm/arch/mx6_plugin.S>
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