[C61] add port1, port2 can + port2 rtc support

* enabled at u-boot: seco_config tool

arch/arm64/boot/dts/seco/overlays/Makefile

@@ -24,9 +24,11 @@ dtbo-$(CONFIG_ARCH_MXC) += \
 	seco-imx8qm-c43-hdmi-sn65dsi86-lvds.dtbo\
 	seco-imx8qm-c43-hdmiin.dtbo\
 	seco-imx8qm-c43-lvds-sn65dsi86.dtbo\
+	seco-imx8mm-c61-port1-can.dtbo\
 	seco-imx8mm-c61-port1-gpios.dtbo\
 	seco-imx8mm-c61-port1-rs232.dtbo\
 	seco-imx8mm-c61-port1-rs485.dtbo\
+	seco-imx8mm-c61-port2-can.dtbo\
 	seco-imx8mm-c61-port2-gpios.dtbo\
 	seco-imx8mm-c61-port2-rs232.dtbo\
 	seco-imx8mm-c61-port2-rs485.dtbo\

arch/arm64/boot/dts/seco/overlays/seco-imx8mm-c61-port1-can-overlay.dts

+/*
+ * Copyright 2017 NXP
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/dts-v1/;
+/plugin/;
+
+/ {
+	compatible = "fsl,imx8mm-evk", "seco,imx8mm-c61", "fsl,imx8mm";
+
+/*  __________________________________________________________________________
+ * |                                                                          |
+ * |                               CAN PORT1                                  |
+ * |__________________________________________________________________________|
+ */
+
+	fragment@ecspi1 {
+		target = <&ecspi1>;
+		__overlay__ {
+			status = "okay";
+
+			can_spi1: mcp258x@0 {
+					compatible = "microchip,mcp2518fd";
+					pinctrl-names = "default";
+					pinctrl-0 = <&pinctrl_can1_int>;
+					reg = <0>;
+					#address-cells = <1>;
+					#size-cells = <1>;
+					interrupt-parent = <&gpio4>;
+					interrupts = <30 IRQ_TYPE_EDGE_FALLING>;
+					spi-max-frequency = <10000000>;
+					clocks = <&osc_20m>;
+					status = "okay";
+			};
+		};
+	};
+
+};
+

arch/arm64/boot/dts/seco/overlays/seco-imx8mm-c61-port2-can-overlay.dts

+/*
+ * Copyright 2017 NXP
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/dts-v1/;
+/plugin/;
+
+/ {
+	compatible = "fsl,imx8mm-evk", "seco,imx8mm-c61", "fsl,imx8mm";
+
+/*  __________________________________________________________________________
+ * |                                                                          |
+ * |                               CAN PORT2                                  |
+ * |__________________________________________________________________________|
+ */
+
+	fragment@ecspi2 {
+		target = <&ecspi2>;
+		__overlay__ {
+			status = "okay";
+
+			can_spi2: mcp258x@0 {
+				compatible = "microchip,mcp2518fd";
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_can2_int>;
+				reg = <0>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				interrupt-parent = <&gpio4>;
+				interrupts = <29 IRQ_TYPE_EDGE_FALLING>;
+				spi-max-frequency = <10000000>;
+				clocks = <&osc_20m>;
+				status = "okay";
+			};
+
+			rtc: pcf2123@1 {
+				compatible = "nxp,rtc-pcf2123";
+				reg = <1>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				spi-max-frequency = <1000000>;
+				spi-cs-high;
+				status = "okay";
+			};
+		};
+	};
+
+};
+

arch/arm64/boot/dts/seco/seco-imx8mm-c61.dts

@@ -75,6 +75,13 @@
 		clock-frequency = <100000000>;
 	};
 
+	osc_20m: clock-osc-20m {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <20000000>;
+		clock-output-names = "osc_20m";
+	};
+
 	reg_usdhc1_vmmc: sd1_regulator {
 		compatible = "regulator-fixed";
 		regulator-name = "WLAN_EN";