[C61] add ov5640 csi support

* enabled at u-boot: seco_config tool

arch/arm64/boot/dts/seco/overlays/Makefile

@@ -24,6 +24,7 @@ dtbo-$(CONFIG_ARCH_MXC) += \
 	seco-imx8qm-c43-hdmi-sn65dsi86-lvds.dtbo\
 	seco-imx8qm-c43-hdmiin.dtbo\
 	seco-imx8qm-c43-lvds-sn65dsi86.dtbo\
+	seco-imx8mm-c61-ov5640.dtbo\
 	seco-imx8mm-c61-port1-can.dtbo\
 	seco-imx8mm-c61-port1-gpios.dtbo\
 	seco-imx8mm-c61-port1-rs232.dtbo\

arch/arm64/boot/dts/seco/overlays/seco-imx8mm-c61-ov5640-overlay.dts

+/*
+ * Copyright 2017 NXP
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <dt-bindings/clock/imx8mm-clock.h>
+#include <dt-bindings/gpio/gpio.h>
+
+/dts-v1/;
+/plugin/;
+
+/ {
+	compatible = "fsl,imx8mm-evk", "seco,imx8mm-c61", "fsl,imx8mm";
+
+/*  __________________________________________________________________________
+ * |                                                                          |
+ * |                               OV5640                                     |
+ * |__________________________________________________________________________|
+ */
+
+	fragment@i2c2 {
+		target = <&i2c2>;
+		__overlay__ {
+			ov5640_mipi: ov5640_mipi@3c {
+				compatible = "ovti,ov5640_mipi";
+				reg = <0x3c>;
+				status = "okay";
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_csi_pwn>, <&pinctrl_csi_rst>;
+				clocks = <&clk IMX8MM_CLK_CLKO1>;
+				clock-names = "csi_mclk";
+				assigned-clocks = <&clk IMX8MM_CLK_CLKO1>;
+				assigned-clock-parents = <&clk IMX8MM_CLK_24M>;
+				assigned-clock-rates = <24000000>;
+				csi_id = <0>;
+				pwn-gpios = <&gpio2 11 GPIO_ACTIVE_HIGH>;
+				rst-gpios = <&gpio2 9 GPIO_ACTIVE_LOW>;
+				mclk = <24000000>;
+				mclk_source = <0>;
+
+				port {
+					ov5640_mipi1_ep: endpoint {
+						remote-endpoint = <&mipi1_sensor_ep>;
+					};
+				};
+			};
+		};
+	};
+
+	fragment@mipi_csi_1 {
+		target = <&mipi_csi_1>;
+		__overlay__ {
+			status = "okay";
+
+			port {
+				mipi1_sensor_ep: endpoint@1 {
+					remote-endpoint = <&ov5640_mipi1_ep>;
+					data-lanes = <2>;
+					csis-hs-settle = <13>;
+					csis-clk-settle = <2>;
+					csis-wclk;
+				};
+
+				csi1_mipi_ep: endpoint@2 {
+					remote-endpoint = <&csi1_ep>;
+				};
+			};
+		};
+	};
+
+	fragment@csi1_bridge {
+		target = <&csi1_bridge>;
+		__overlay__ {
+			status = "okay";
+
+			port {
+				csi1_ep: endpoint {
+					remote-endpoint = <&csi1_mipi_ep>;
+				};
+			};
+		};
+	};
+
+};