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Clea OS
bsp
nxp
linux-seco-imx
Commits
00659ac2
Commit
00659ac2
authored
2 years ago
by
Gianfranco Mariotti
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[D18] enable AW-CM276NF (based on 88W8997)
parent
e603b553
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arch/arm64/boot/dts/seco/seco-imx8mp-d18.dts
+78
-0
78 additions, 0 deletions
arch/arm64/boot/dts/seco/seco-imx8mp-d18.dts
arch/arm64/configs/seco_imx8_linux_defconfig
+2
-0
2 additions, 0 deletions
arch/arm64/configs/seco_imx8_linux_defconfig
with
80 additions
and
0 deletions
arch/arm64/boot/dts/seco/seco-imx8mp-d18.dts
+
78
−
0
View file @
00659ac2
...
@@ -343,6 +343,24 @@
...
@@ -343,6 +343,24 @@
pinctrl-0 = <&pinctrl_pca6416_20>;
pinctrl-0 = <&pinctrl_pca6416_20>;
interrupt-parent = <&gpio1>;
interrupt-parent = <&gpio1>;
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
wifi_clk_en {
gpio-hog;
gpios = <9 GPIO_ACTIVE_HIGH>;
output-high;
};
wifi_pwrdwn {
gpio-hog;
gpios = <10 GPIO_ACTIVE_HIGH>;
output-high;
};
wifi_disable {
gpio-hog;
gpios = <11 GPIO_ACTIVE_HIGH>;
output-low;
};
};
};
ov5640_1: ov5640_mipi@3c {
ov5640_1: ov5640_mipi@3c {
...
@@ -551,6 +569,33 @@
...
@@ -551,6 +569,33 @@
status = "okay";
status = "okay";
};
};
&usdhc1 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1>;
pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
bus-width = <4>;
non-removable;
status = "okay";
sd8xxx-wlan {
//drvdbg = <0x37>;
drv_mode = <0x1>;
cfg80211_wext = <0xf>;
sta_name = "mlan";
wfd_name = "p2p";
max_vir_bss = <1>;
cal_data_cfg = "mrvl/cal_data.conf";
fw_name = "mrvl/sdsd8997_combo_v4.bin";
reg_alpha2 = "US";
p2p_enh = <1>;
auto_ds=<0>;
inact_tmo = <3000>;
gtk_rekey_offload = <1>;
cfg80211_drcs = <0>;
};
};
&usdhc2 {
&usdhc2 {
assigned-clocks = <&clk IMX8MP_CLK_USDHC2>;
assigned-clocks = <&clk IMX8MP_CLK_USDHC2>;
assigned-clock-rates = <400000000>;
assigned-clock-rates = <400000000>;
...
@@ -797,6 +842,39 @@
...
@@ -797,6 +842,39 @@
>;
>;
};
};
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x190
MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d0
MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d0
MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d0
MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d0
MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d0
>;
};
pinctrl_usdhc1_100mhz: usdhc1grp-100mhz {
fsl,pins = <
MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x194
MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d4
MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d4
MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d4
MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d4
MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d4
>;
};
pinctrl_usdhc1_200mhz: usdhc1grp-200mhz {
fsl,pins = <
MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x196
MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d6
MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d6
MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d6
MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d6
MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d6
>;
};
pinctrl_usdhc2: usdhc2grp {
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
fsl,pins = <
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190
...
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arch/arm64/configs/seco_imx8_linux_defconfig
+
2
−
0
View file @
00659ac2
...
@@ -319,6 +319,8 @@ CONFIG_BROADCOM_PHY=m
...
@@ -319,6 +319,8 @@ CONFIG_BROADCOM_PHY=m
CONFIG_INPHI_PHY=y
CONFIG_INPHI_PHY=y
CONFIG_MARVELL_PHY=m
CONFIG_MARVELL_PHY=m
CONFIG_MARVELL_10G_PHY=m
CONFIG_MARVELL_10G_PHY=m
CONFIG_BT_MRVL=m
CONFIG_BT_MRVL_SDIO=m
CONFIG_SD8997_SDIO=y
CONFIG_SD8997_SDIO=y
CONFIG_SD8997_BT_SDIO=y
CONFIG_SD8997_BT_SDIO=y
CONFIG_CAN_MCP251XFD=y
CONFIG_CAN_MCP251XFD=y
...
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